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BQ2084DBTR-V143G4 Datasheet(PDF) 4 Page - Texas Instruments |
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BQ2084DBTR-V143G4 Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 71 page  www.ti.com PLL SWITCHING CHARACTERISTICS OSCILLATOR DATA FLASH MEMORY CHARACTERISTICS REGISTER BACKUP SMBus TIMING SPECIFICATIONS bq2084-V143 SLUS732 – SEPTEMBER 2006 V DD = 3 V to 3.6 V, TA = –20°C to 85°C unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP MAX UNIT t(SP) Start-up time (1) ±0.5% frequency error 2 5 ms (1) The frequency error is measured from the trimmed frequency of the internal system clock, which is 128 x oscillator frequency, nominally 4.194 MHz. V DD = 3 V to 3.6 V, TA = –20°C to 85°C (unless otherwise noted) (TYP: VDD = 3.3 V, TA = 25°C) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ROSC = 100k –2% 0.5% 2% f(eio) Frequency error from 32.768 kHz XCK1 = 12 pF XTAL –0.25% 0.25% f(dio) Frequency drift(1) ROSC = 100k, TA = 0°C to 50°C –1% 1% f(sio) ROSC = 100k 200 µs Start-up time(2) f(sxo) XCK1 = 12 pF XTAL 250 ms (1) The frequency drift is measured from the trimmed frequency at VDD = 3.3 V, TA = 25°C. (2) The start-up time is defined as the time it takes for the oscillator output frequency to be ±1% V DD = 3 V to 3.6 V, TA = –20°C to 85°C unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tDR Data retention See (1) 10 Years Flash programming write-cycles See (1) 20k Cycles t(WORDPROG) Word programming time See (1) 2 ms I(DDPROG) Flash-write supply current See (1) 8 12 mA (1) Specified by design. Not production tested. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT I(RBI) RBI data-retention input current VRBI > 2 V, VDD < VIT 10 100 nA V(RBI) RBI data-retention voltage (1) 1.3 V (1) Specified by design. Not production tested. V DD = 3 V to 3.6 V, TA = -20°C to 85°C unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP MAX UNIT f(SMB) SMBus operating frequency Slave mode, SMBC 50% duty cycle 10 100 kHz f(MAS) SMBus master clock frequency Master mode, no clock low slave extend 51.2 kHz t(BUF) Bus free time between start and stop 4.7 µs T(HD:STA) Hold time after (repeated) start 4 µs t(SU:STA) Repeated start setup time 4.7 µs t(SU:STO) Stop setup time 4 µs Receive mode 0 t(HD:DAT) Data hold time ns Transmit mode 300 tSU:DAT) Data setup time 250 ns t(TIMEOUT) Error signal/detect See (1) 25 35 ms t(LOW) Clock low period 4.7 µs (1) The bq2084-V143 times out when any clock low exceeds t(TIMEOUT). 4 Submit Documentation Feedback |
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