RISC DSP Communication

R1121

16 Bit RISC Micro Processor

Specifications subject to change without notice, contact your sales representatives for the most update information.

RDC Confidential

Page 3 of 5

REV 1.0 May. 03 2007

2. Block Diagram

DMA

Unit

DRAM

Control

Unit

Chip

Select

Unit

Refresh

Control

Unit

Bus

Interface

Unit

PIO

Unit

Timer Control

Unit

Interrupt

Control Unit

Clock and

Power

Management

Asynchro-

nous Serial

Port0

Instruction

Queue (64bits)

Instruction

Decoder

Register

File

General,

Segment,

Eflag Register

ALU

(Special,

Logic,

Adder,

BSF)

Micro

ROM

EA / LA

Address

Control Signal

Execution

Unit

X1

X2

CLKOUTA

CLKOUTB INT6-INT4

INT0

TMRIN0

TMROUT0

TMRIN1

TMROUT1

DRQ0

DRQ1

TXD0

RXD0

A19-A0(MA8-MA0)

AD15~AD0

ALE

RD

VCC

GND

LCS/ONCE0

UCS/ONCE1

PCS5/A1

PCS6/A2

ARDY

SRDY

S2~S0

DT/R

DEN

HOLD

HLDA

S6/CLKDIV2

UZI

WR

BHE/ADEN

WLB

WHB

Asynchro-

nous Serial

Port1

RTS0/RTR0

CTS0/ENRX0

TXD1

RXD1

RTS1/RTR1

CTS1/ENRX1

INT1/SELECT

INT3/INTA1/IRQ

INT2/INTA0

NMI

RST

MCS0/RAS

MCS1/UCAS

MCS2/LCAS

MCS3/RFSH