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HYS72T1G042ER-5-B Datasheet(PDF) 11 Page - Qimonda AG |
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HYS72T1G042ER-5-B Datasheet(HTML) 11 Page - Qimonda AG |
11 / 31 page Internet Data Sheet Rev. 1.0, 2007-04 11 04242007-NQ2Z-YM3O HYS72T1G042ER–5–B Registerd DDR2 SDRAM Module TABLE 6 Abbreviations for Buffer Type TABLE 7 Abbreviations for Pin Type 2, 5, 8, 11, 14, 17, 20, 23, 26, 29, 32, 35, 38, 41, 44, 47, 50, 65, 66, 79, 82, 85, 88, 91, 94, 97, 100, 103, 106, 109, 112, 115, 118, 121, 124, 127, 130, 133, 136, 139, 142, 145, 148, 151, 154, 157, 160, 163, 166, 169, 198, 201, 204, 207, 210, 213, 216, 219, 222, 225, 228, 231, 234, 237 V SS GND — Ground Plane Other Pins 19, 102, 137, 138, NC NC — Not connected 195 ODT0 I SSTL On-Die Termination Control 1:0 Note: 2-Ranks module 77 ODT1 I SSTL NC NC — Note: 1-Rank modules Abbreviation Description SSTL Serial Stub Terminated Logic (SSTL_18) CMOS CMOS Levels OD Open Drain. The corresponding pin has 2 operational states, active low and tristate, and allows multiple devices to share as a wire-OR. Abbreviation Description I Standard input-only pin. Digital levels. O Output. Digital levels. I/O I/O is a bidirectional input/output signal. AI Input. Analog levels. PWR Power GND Ground NU Not Usable NC Not Connected Ball No. Name Pin Type Buffer Type Function |
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