Internet Data Sheet

Rev. 1.0, 2006-10

6

10202006-L0SM-FEYT

HYS[64/72]T[32/64/128][0/9]xxEU-[25F/2.5/3/3S/3.7]-B2

Unbuffered DDR2 SDRAM Module

TABLE 3

Address Format

TABLE 4

Components on Modules

DIMM

Density

Module

Organization

Memory

Ranks

ECC/

Non-ECC

# of SDRAMs # of row/bank/column

bits

Raw

Card

256 MByte

32M

× 64

1

Non-ECC

4

13/2/10

C

512 MByte

64M

× 64

1

Non-ECC

8

14/2/10

D

512 MByte

72M

× 64

1

ECC

9

14/2/10

F

1 GByte

128M

× 64

2

Non-ECC

16

14/2/10

E

1 GByte

128M

× 72

2

ECC

18

14/2/10

G

1) Green Product

2) For a detailed description of all functionalities of the DRAM components on these modules see the component data sheet.

DRAM Components1)

DRAM Density

DRAM Organization

HYS64T32[0/9]00EU

HYB18T512160B2F

512 Mbit

32M

× 16

HYS64T64[0/9]00EU

HYB18T512800B2F

512 Mbit

64M

× 8

HYS72T64[0/9]00EU

HYB18T512800B2F

512 Mbit

64M

× 8

HYS64T128[0/9]20EU

HYB18T512800B2F

512 Mbit

64M

× 8

HYS72T128[0/9]20EU

HYB18T512800B2F

512 Mbit

64M

× 8