HYS64T128020HU-2.5-B datasheet(7/87 Pages) QIMONDA

Part #	HYS64T128020HU-2.5-B

Description	240-Pin unbuffered DDR2 SDRAM Modules

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Manufacturer	QIMONDA [Qimonda AG]

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Internet Data Sheet

Rev. 1.3, 2006-12

7

03292006-6GMD-RSFT

HYS[64/72]T[32/64/128]xx0HU-[25F/2.5/3/3S/3.7/5]-B

Unbuffered DDR2 SDRAM Module

2

Pin Configuration

This chapter describes the Pin Configuration.

2.1

Pin Configuration

This chapter contains the Pin Configuration tables.

The pin configuration of the Unbuffered DDR2 SDRAM DIMM

is listed by function in Table 5 (240 pins). The abbreviations

used in columns Pin and Buffer Type are explained in Table 6

and Table 7 respectively. The pin numbering is depicted in

Figure 1 for non-ECC modules (

×64) and Figure 2 for ECC

modules

(×72).

TABLE 5

Pin Configuration of UDIMM

Ball No.

Name

Type

Buffer

Type

Function

Clock Signals

185

CK0

I

SSTL

Clock Signals 2:0, Complement Clock Signals 2:0

137

CK1

I

SSTL

220

CK2

I

SSTL

186

CK0

I

SSTL

138

CK1

I

SSTL

221

CK2

I

SSTL

52

CKE0

I

SSTL

Clock Enable Rank 1:0

Note: 2 Ranks module

171

CKE1

I

SSTL

NC

—

Not Connected

Note: 1 Rank module

Control Signals

193

S0#

I

SSTL

Chip Select Rank 1:0

Note: 2 Ranks module

76

S1#

I

SSTL

NC

—

Not Connected

Note: 1 Rank module

192

RAS

I

SSTL

Row Address Strobe

74

CAS

I

SSTL

Column Address Strobe

73

WE

I

SSTL

Write Enable

Address Signals

71

BA0

I

SSTL

Bank Address Bus 1:0

190

BA1

I

SSTL

54

BA2

I

SSTL

Bank Address Bus 2

Greater than 512Mb DDR2 SDRAMS

NC

—

Not Connected

Less than 1Gb DDR2 SDRAMS

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HYS64T128020HU-2.5-B Datasheet(PDF) 7 Page - Qimonda AG

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