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HYS64T64900HU Datasheet(PDF) 8 Page - Qimonda AG |
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HYS64T64900HU Datasheet(HTML) 8 Page - Qimonda AG |
8 / 76 page Internet Data Sheet Rev. 1.41, 2007-05 8 03292006-EZUJ-JY4S HYS[64/72]T[32/64/128]xx0HU–[3/3S/3.7/5]–A Unbuffered DDR2 SDRAM Modules 188 A0 I SSTL Address Bus 12:0 183 A1 I SSTL 63 A2 I SSTL 182 A3 I SSTL 61 A4 I SSTL 60 A5 I SSTL 180 A6 I SSTL 58 A7 I SSTL 179 A8 I SSTL 177 A9 I SSTL 70 A10 I SSTL AP I SSTL 57 A11 I SSTL 176 A12 I SSTL 196 A13 I SSTL Address Signal 13 Note: 1 Gbit based module and 512M ×4/×8 NC NC — Not Connected Note: Module based on 1 Gbit ×16 Module based on 512 Mbit ×16 or smaller 174 A14 I SSTL Address Signal 14 Note: Modules based on 2 Gbit NC NC — Not Connected Note: Modules based on 1 Gbit or smaller Data Signals 3 DQ0 I/O SSTL Data Bus 63:0 Data Input/Output pins 4 DQ1 I/O SSTL 9 DQ2 I/O SSTL 10 DQ3 I/O SSTL 122 DQ4 I/O SSTL 123 DQ5 I/O SSTL 128 DQ6 I/O SSTL 129 DQ7 I/O SSTL Ball No. Name Pin Type Buffer Type Function |
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