10/16

●

At standby

○

Current at standby

Set CSB “H”, and be sure to set SCK, SI, WPB, HOLDB input “L” or “H”. Do not input intermediate electric potantial.

○

Timing

As shown in Fig.43, at standby, when SCK is “H”, even if CSB is fallen, SI status is not read at fall edge. SI status is read at

SCK rise edge after fall of CSB. At standby and at power ON/OFF, set CSB “H” status.

●

WPB cancel valid area

WPB is normally fixed to “H” or “L” for use, but when WPB is controlled so as to cancel write status register command and write

command, pay attention to the following WPB valid timing.

While write or write status register command is executed, by setting WPB = “L” in cancel valid area, command can be

cancelled. The area from command ope code before CSB rise at internal automatic write start becomes the cancel valid area.

However, once write is started, any input cannot be cancelled. WPB input becomes Don’t Care, and cancellation becomes

invalid.

●

HOLDB pin

By HOLDB pin, command communication can be stopped temporarily. (HOLD status) The HOLDB pin carries out command

communications normally when it is HIGH. To get in HOLD status, at command communication, when SCK=LOW, set the

HOLDB pin LOW. At HOLD status, SCK and SI become Don’t Care, and SO becomes high impedance (High-Z). To release the

HOLD status, set the HOLDB pin HIGH when SCK=LOW. After that, communication can be restarted from the point before the

HOLD status. For example, when HOLD status is made after A5 address input at read, after release of HOLD status, by starting

A4 address input, read can be restarted. When in HOLD status, leave CSB LOW. When it is set CSB=HIGH in HOLD status,

the IC is reset, therefore communication after that cannot be restarted.

0

1

2

Command start here. SI is read.

Even if CSB is fallen at SCK=SI=”H”,

SI status is not read at that edge.

CSB

SCK

SI

Fig.43 Operating timing

15

16

Ope code

Data

tE/W

data write time

WPB cancel invalid area

WPB cancel invalid area

invalid

WPB cancel invalid area

SCK

CSB

Ope code

Address

tE/W

data write time

WPB cancel invalid area

WPB cancel invalid area

Data

WPB cancel invalid area

invalid

valid

Fig.44 WPB valid timing (WRSR)

Fig.45 WPB valid timing (WRITE)