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2EZ24 Datasheet(PDF) 3 Page - Pan Jit International Inc. |
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2EZ24 Datasheet(HTML) 3 Page - Pan Jit International Inc. |
3 / 4 page PAGE . 3 STAD-NOV.15.2004 APPLICATION NOTE: Since the actual voltage available from a given zener diode is temperature dependent, it is necessary to determinejunction temperature under any set of operating conditions in order to calculate its value. The following procedure is recommended: Lead Temperature, T , should be determined from: T= LA P + T L is the lead-to-ambient thermal resistance ( C/W) and Pd is the power dissipation. The value for L will vary and depends on the device mounting method. L is generally 30-40 C/W for the various clips and tie points in common use and for printed circuit board wiring. The temperature of the lead can also be measured using a thermocouple placed on the lead as close as possible to the tie poin The thermal mass connected to the tie point is normally large enough so that it will not significantly respond to heat surges generated in the diode as a result of pulsed operation once steady-state conditions are achieved. Using the measured value of TL, the junction temperature may be determined by: T= T + T T is the increase in junction temperature above the lead temperature and may be found from Figure 2 for a train of power puls or from Figure 10 for dc power. T= J P For worst-case design, using expected limits of I , limits of P and the extremes of T ( T ) may be estimated. Changes in volta V , can then be found from: V= V T V , the zener voltage temperature coefficient, is found from Figures 5 and 6. Under high power-pulse operation, the zener voltage will vary with time and may also be affected significantly by the zener resis For best regulation, keep current excursions as low as possible. Data of Figure 2 should not be used to compute surge capa-bility. Surge limitations are given in Figure 3. They are lower than w be expected by considering only junction temperature, as current crowding effects cause temperatures to be extremely high in s spots resulting in device degradation should the limits of Figure 3 be exceeded. L LD A A A A JL JL JL Z q q q q D D Dq D Dq D q O O JL L D ZD J J Z ZJ |
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