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RT8101PS Datasheet(PDF) 5 Page - Richtek Technology Corporation |
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RT8101PS Datasheet(HTML) 5 Page - Richtek Technology Corporation |
5 / 15 page 5 RT8101/A Preliminary DS8101/A-01 March 2007 www.richtek.com Parameter Symbol Test Conditions Min Typ Max U nits Ramp Amplitude ΔVOSC VCC = 12V -- 1.5 -- VP-P Reference Voltage PWM Error Amplifier Reference VREF 0.792 0.8 0.808 V Error Amplifier Open Loop DC Gain AO -- 88 -- dB Gain-Bandwidth Product GBW -- 15 -- MH z Slew R ate SR -- 6 -- V/us PWM Controller Gate Drivers (VCC = 12V) Upper Gate Source IUGATE VBOOT − VPHASE = 12V, VBOOT − VUGATE = 6V -- 300 -- mA Upper Gate Source RUGATE VBOOT − VPHASE = 12V, VBOOT − VUGATE = 1V -- 7 10 Ω Upper Gate Sink RUGATE VBOOT − VPHASE = 12V, VUGATE − VPHASE = 1V -- 4 8 Ω Lower Gate Source ILGATE VCC = 12V, VLGATE = 6V -- 500 -- mA Lower Gate Source RLGATE VCC − VLGATE = 1V -- 4 6 Ω Lower Gate Sink RLGATE VLGATE = 1V -- 2 4 Ω Protection Under Voltage Protection Measuring VFB 0.3 0.4 0.5 V Over C urrent Threshold VOC Measuring VPHASE −210 −250 −290 mV Soft-Start Interval TSS 2 3.2 4.2 ms Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. Devices are ESD sensitive. Handling precaution recommended. Note 3. The device is not guaranteed to function outside its operating conditions. Note 4. θJA is measured in the natural convection at TA = 25°C on a high effective 4-layers thermal conductivity test board of JEDEC 51-7 thermal measurement standard. |
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