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RT9259CPQV Datasheet(PDF) 3 Page - Richtek Technology Corporation |
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RT9259CPQV Datasheet(HTML) 3 Page - Richtek Technology Corporation |
3 / 15 page RT9259C 3 DS9259C-03 August 2007 www.richtek.com Function Block Diagram Driver Logic GND LGATE BOOT UGATE PHASE Soft-Start & Fault Logic Oscillator Power On Reset VCC12 FB Voltage Reference Bias EA + - PWM + - + POR SSE 5V Regulator + - + - + - + VCC12 0.4V FBL DRV RT_DIS Shutdown Inhibit SSE COMP PGND - + 5VDD + - PH_M OC 40uA 1.5V V REF1 V REF2 0.4V R OCSET 20k Pin No. RT9259C S RT9259C A RT9259CPQV Pin Name Pin Function 6 6 4 FBL Linear regulator feedback voltage. This pin is the inverting input of the LDO error amplifier and protection monitor. Connect this pin to an external resistor divider network of the linear regulator. 7 7, 8 5 GND Ground. 8 9, 10 7 VCC12 Connect this pin to a well-decoupled 12V bias supply. It is also the positive supply for the lower gate driver, LGATE. 9, 10 11, 12 6, 8, 9, 10, Exposed Pad (17) NC No Internal Connection. 11 13 11 LGATE Lower gate driver output. Connect to the gate of the low-side power N-MOSFET. This pin is monitored by the adaptive shoot-through protection circuitry to determine when the lower MOSFET has turned off. 12 14 12 PGND Power ground return for the lower gate driver. 13 15 13 PHASE Connect this pin to the source of the upper MOSFET and the drain of the lower MOSFET. This pin is monitored by the adaptive shoot-through protection circuitry to determine when the upper MOSFET has turned off. 14 16 14 UGATE Connect this pin to a well-decoupled 12V bias supply. It is also the positive supply for the lower gate driver, LGATE. |
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