BQ4013YMA-70 datasheet(11/15 Pages) TI

Part #	BQ4013YMA-70

Description	128 k X 8 NONVOLATILE SRAM (5 V, 3.3 V)

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Manufacturer	TI [Texas Instruments]

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VCC

tPF

tFS

tDR

tCER

tPU

tWPT

VPFD

4.75 V

4.25 V

VSO

CE

bq4013/Y/LY

SLUS121A – MAY 1999 – REVISED MAY 2007

Table 4. 5-V POWER-DOWN/POWER-UP (TA = TOPR)

PARAMETER

TEST CONDITIONS

MIN TYP(1)

MAX

UNIT

tPF

VCC slew, 4.75 to 4.25 V

300

µs

tFS

VCC slew, 4.25 to VSO

10

µs

tPU

VCC slew, VSO to VPFD (max.)

0

µs

Time during which SRAM is write-protected after

tCER

Chip enable recovery time

40

80

120

ms

VCC passes VPFD on power-up.

tDR

Data-retention time in absence of VCC

TA = 25°C(2)

10

years

Delay after VCC slews down past VPFD before SRAM

tWPT

Write-protect time

40

100

150

µs

is writeprotected.

(1)

Typical values indicate operation at TA = 25°C, VCC = 5V.

(2)

Batteries are disconnected from circuit until after VCC is applied for the first time. tDR is the accumulated time in absence of power

beginning when power is first applied to the device.

Figure 10. 5-V Power-Down/Power-Up Timing

11

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BQ4013YMA-70 Datasheet(PDF) 11 Page - Texas Instruments

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