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PM6680TR Datasheet(PDF) 10 Page - STMicroelectronics |
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PM6680TR Datasheet(HTML) 10 Page - STMicroelectronics |
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10 / 49 page  Pin settings PM6680 10/49 16 SGND2 Signal ground for analog circuitry. It must be connected to the signal ground plan of the power supply. 17 V5SW Internal 5V regulator bypass connection. • If V5SW is connected to OUT5 (or to an external 5V supply) and V5SW is greater than 4.9V, the LDO5 regulator shuts down and the LDO5 pin is directly connected to OUT5 through a 3 Ω (max) switch. If V5SW is connected to GND, the LDO5 linear regulator is always on. 18 LDO5 5V internal regulator output. It can provide up to 100mA peak current. LDO5 pin supplies embedded low side gate drivers and an external load. 19 VIN Device supply voltage input and battery voltage sense. A bypass filter (4 Ω and 4.7 µF) between the battery and this pin is recommended. 20 CSENSE1 Positive current sense input for the switching section 1. This pin must be connected through a resistor to the drain of the synchronous rectifier (RDSON sensing) to obtain a positive current limit threshold for the power supply controller. 21 PHASE1 Switch node connection and return path for the high side driver for the section 1.It is also used as negative current sense input. 22 HGATE1 High-side gate driver output for section 1. This is the floating gate driver output. 23 BOOT1 Bootstrap capacitor connection for the switching section 1. It supplies the high-side gate driver. 24 SKIP Pulse skipping mode control input. • If the pin is connected to LDO5 the PWM mode is enabled. • If the pin is connected to GND, the pulse skip mode is enabled. • If the pin is connected to VREF the pulse skip mode is enabled but the switching frequency is kept higher than 33KHz (No-audible pulse skip mode). 25 EN1 Enable input for the switching section 1. • The section 1 is enabled applying a voltage greater than 2.4V to this pin. • The section 1 is disabled applying a voltage lower than 0.8V. When the section is disabled the High Side gate driver goes low and Low Side gate driver goes high. 26 PGOOD1 Power Good output signal for the section 1. This pin is an open drain output and when the output of the switching section 1 is out of +/- 10% of its nominal value.It is pulled down. 27 PGOOD2 Power Good output signal for the section 2. This pin is an open drain output and when the output of the switching section 2 is out of +/- 10% of its nominal value.It is pulled down. 28 FB1 Feedback input for the switching section 1. This pin is connected to a resistive voltage-divider from OUT1 to PGND to adjust the output voltage from 0.9V to 5.5V. Table 4. Pin functions (continued) N° Pin Function |
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