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2003-REV 090
TIWIN Semiconductor
• www.tiwin.com.tw • Tel :(886)-3 -5636031 • Fax:(886)-3-5644823 23
T68 K/S/R 1M
Speed Bin
-7 (70ns)
-8(85ns)
-10(100ns)
Symbol
Parameter List
Min
Max
Min
Max
Min
Max
Units
tRC
Read Cycle Time
70
-
85
-
100
-
ns
tAA
Address Access Time
-
70
-
85
-
100
ns
tCO
Chip Select to Output
-
70
-
85
-
100
ns
tOE
Output Enable to Valid Output
-
35
-
40
-
50
ns
tLZ
Chip Select to Low-Z Output
10
-
10
-
10
-
ns
tOLZ
Output Enable to Low-Z Output
5
-
5
-
5
-
ns
tHZ
Chip Disable to High-Z Output
0
25
0
25
0
30
ns
tOHZ
Output Disable to High-Z Output
0
25
25
30
ns
tOH
Output Hold From Address
10
-
10
-
15
-
ns
Speed Bin
-7 (70ns)
-8(85ns)
-10 (100ns)
Symbol
Parameter List
Min
Max
Min
Max
Min
Max
Units
tWC
Write Cycle Time
70
-
85
-
100
-
ns
tCW
Chip Select to End of Write
60
-
70
-
80
-
ns
tAS
Address Setup Time
0
-
0
-
0
-
ns
tAW
Address Valid to End of Write
60
-
70
-
80
-
ns
tWP
Write Pulse Width
55
-
60
-
70
-
ns
tWR
Write Recovery Time
0
-
0
-
0
-
ns
tWHZ
Write to Output High-Z
0
25
0
25
0
30
ns
tDW
Data to Write Time Overlap
30
-
35
-
40
-
ns
tDH
Data Hold from Write Time
0
-
0
-
0
-
ns
tOW
End Write to Output Low-Z
5
-
5
-
5
-
ns
¢ AC ELECTRICAL CHARACTERISTICS
˜
TEST CONDITIONS
Input Pulse Level: 0.2Vcc(≦ViL), 0.8Vcc(≧VIH)
Input Rising and Falling Time: 5ns
Input and Output Reference Voltage: 0.9V(R), 1.1V(S), 1.5V (K)
Output Load: CL = 30pF + one TTL gate
˜
READ CYCLE
˜ WRITE CYCLE
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