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SN54AS74AJ Datasheet(PDF) 1 Page - Texas Instruments |
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SN54AS74AJ Datasheet(HTML) 1 Page - Texas Instruments |
1 / 18 page SN54ALS74A, SN54AS74A, SN74ALS74A, SN74AS74A DUAL POSITIVEEDGETRIGGERED DTYPE FLIPFLOPS WITH CLEAR AND PRESET SDAS143C − APRIL 1982 − REVISED AUGUST 1995 Copyright 1995, Texas Instruments Incorporated 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 • Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs TYPE TYPICAL MAXIMUM CLOCK FREQUENCY (CL = 50 pF) (MHz) TYPICAL POWER DISSIPATION PER FLIP-FLOP (mW) ′ALS74A 50 6 ′AS74A 134 26 description These devices contain two independent positive-edge-triggered D-type flip-flops. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup-time requirements are transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of CLK. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. The SN54ALS74A and SN54AS74A are characterized for operation over the full military temperature range of − 55 °C to 125°C. The SN74ALS74A and SN74AS74A are characterized for operation from 0 °C to 70°C. FUNCTION TABLE INPUTS OUTPUTS PRE CLR CLK D Q Q L H X X H L H LX XL H L LX X H† H† H H ↑ HH L H H ↑ LL H H H L X Q0 Q0 † The output levels in this configuration are not specified to meet the minimum levels for VOH if the lows at PRE and CLR are near VIL maximum. Furthermore, this configuration is nonstable; that is, it does not persist when PRE or CLR returns to its inactive (high) level. SN54ALS74A, SN54AS74A ...J PACKAGE SN74ALS74A, SN74AS74A ...D OR N PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 14 13 12 11 10 9 8 1CLR 1D 1CLK 1PRE 1Q 1Q GND VCC 2CLR 2D 2CLK 2PRE 2Q 2Q SN54ALS74A, SN54AS74A . . . FK PACKAGE (TOP VIEW) 32 1 20 19 910 11 12 13 4 5 6 7 8 18 17 16 15 14 2D NC 2CLK NC 2PRE 1CLK NC 1PRE NC 1Q NC − No internal connection PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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