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MAX5072ETJ+ Datasheet(PDF) 9 Page - Maxim Integrated Products

Part # MAX5072ETJ+
Description  2.2MHz, Dual-Output Buck or Boost Converter with POR and Power-Fail Output
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX5072ETJ+ Datasheet(HTML) 9 Page - Maxim Integrated Products

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2.2MHz, Dual-Output Buck or Boost
Converter with POR and Power-Fail Output
_______________________________________________________________________________________
9
Typical Operating Characteristics (continued)
(V+ = VL = 5.2V, TA = +25°C, unless otherwise noted.)
Pin Description
PIN
NAME
FUNCTION
1
CLKOUT
Clock Output. CLKOUT is 45° phase-shifted with respect to converter 2 (SOURCE2, Figure 3). Connect
CLKOUT (master) to the SYNC of a second MAX5072 (slave) for a four-phase converter.
2
BST2/VDD2
Buck Converter Operation—Bootstrap Flying-Capacitor Connection for Converter 2. Connect BST2/VDD2
to an external ceramic capacitor and diode according to the Standard Application Circuit (Figure 1).
Boost Converter Operation—Driver Bypass Capacitor Connection. Connect a low-ESR 0.1µF ceramic
capacitor from BST2/VDD2 to PGND (Figure 9).
3, 4
DRAIN2
Connection to Converter 2 Internal MOSFET Drain. Buck converter operation—use the MOSFET as a
high-side switch and connect DRAIN2 to the input supply. Boost converter operation—use the MOSFET
as a low-side switch and connect DRAIN2 to the inductor and diode junction (Figure 9).
5
EN2
Active-High Enable Input for Converter 2. Drive EN2 low to shut down converter 2, drive EN2 high for normal
operation. Use EN2 in conjunction with EN1 for supply sequencing. Connect to VL for always-on operation.
6
FB2
Feedback Input for Converter 2. Connect FB2 to a resistive divider between converter 2’s output and SGND
to adjust the output voltage. To set the output voltage below 0.8V, connect FB2 to a resistive voltage-divider
from BYPASS to regulator 2’s output (Figure 6). See the Setting the Output Voltage section.
7
COMP2
Compensation Connection for Converter 2. See the Compensation section to compensate converter 2’s
control loop.
8
PFO
Dying Gasp Comparator Output. The PFO open-drain output goes low when PFI falls below the 0.78V reference.
9
SYNC
External Clock Synchronization Input. Connect SYNC to a 400kHz to 4400kHz clock to synchronize the
switching frequency with the system clock. Each converter frequency is one half the frequency applied to
SYNC. Connect SYNC to SGND when not used.
10
PFI
Dying Gasp Comparator Noninverting Input. Connect a resistor-divider from the input supply to PFI. PFI
forces PFO low when VPFI falls below 0.78V. The PFI comparator has a 20mV (typ) hysteresis. This is an
uncommitted comparator and can be used for any protection feature such as OVP or POWER-GOOD.
100ms/div
MANUAL RESET (MR)
MAX5072 toc23
VOUT1 = 3.3V
5V/div
MR
5V/div
RST
5V/div
VOUT2 = 2.5V
5V/div
400ns/div
FOUR-PHASE OPERATION
(SEE FIGURE 3)
MAX5072 toc24
0V
0V
0V
SOURCE 1
(MASTER)
SOURCE 2
(MASTER)
SOURCE 1
(SLAVE)
SOURCE 2
(SLAVE)


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