SYS8512FKX-70/85/10/12

ISSUE 5.0 November 1999

3

Capacitance

Capacitance

Capacitance

Capacitance

Capacitance (V

Note: Capacitance calculated, not measured.

Operation Truth Table

Operation Truth Table

Operation Truth Table

Operation Truth Table

Operation Truth Table

Low V

Low V

Low V

Low V

Low V

cc

cc

cc

cc

Data Retention Characteristics - L Version Only

Data Retention Characteristics - L Version Only

Data Retention Characteristics - L Version Only

Data Retention Characteristics - L Version Only

Parameter

Symbol

Test Condition

max

Unit

Input Capacitance (CS, A17, A18)

C

IN1

V

10

pF

I/P Capacitance (other)

C

IN2

V

40

pF

I/O Capacitance

C

I/O

V

40

pF

CS

OE

WE

DATA PINS

SUPPLY CURRENT

MODE

H

X

X

High Impedance

Standby

L

L

H

Data Out

Read

L

L

L

Data In

Write

L

H

L

Data In

Write

-L Part

Parameter

Symbol Test Condition

min

max

V

V

DR

CS - V

2.0

-

-

Data Retention Current

V

I

CCDR2

T

-

9

230

µA

I

CCDR3

T

-

-

310

µA

Chip Deselect to

Data Retention Time

t

CDR

See Retention Waveform

0-

-

0

-

-

ns

Operation Recovery Time

t

R

See Retention Waveform

5-

-

0

-

-

ms

Notes (1) Typical figures are measured at 25°C.

(2) This parameter is guaranteed not tested.

* Input pulse levels: 0V to 3.0V

* Input rise and fall times: 5ns

* Input and Output timing reference levels: 1.5V

* Output load: see diagram

* V

AC Test Conditions

AC Test Conditions

AC Test Conditions

AC Test Conditions

AC Test Conditions

Output Load

Output Load

Output Load

Output Load

Output Load