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S29PL129N70GFWW00 Datasheet(PDF) 7 Page - SPANSION |
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S29PL129N70GFWW00 Datasheet(HTML) 7 Page - SPANSION |
7 / 74 page June 6, 2007 S29PL-N_00_A5 S29PL-N MirrorBit ™ Flash Family 7 Da ta Shee t (Prelim i nar y ) Figures Figure 2.1 Logic Symbols – PL256N, PL129N, and PL127N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 4.1 Connection Diagram – 84-ball Fine-Pitch Ball Grid Array (S29PL256N) . . . . . . . . . . . . . . . . 12 Figure 4.2 Physical Dimensions – 84-ball Fine-Pitch Ball Grid Array (S29PL256N). . . . . . . . . . . . . . . . 13 Figure 4.3 Connection Diagram – 64-Ball Fine-Pitch Ball Grid Array (S29PL127N). . . . . . . . . . . . . . . . 14 Figure 4.4 Connection Diagram – 64-Ball Fine-Pitch Ball Grid Array (S29PL129N). . . . . . . . . . . . . . . . 15 Figure 4.5 Physical Dimensions – 64-Ball Fine-Pitch Ball Grid Array (S29PL-N). . . . . . . . . . . . . . . . . . . . . . . 16 Figure 7.1 Single Word Program Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 7.2 Write Buffer Programming Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 7.3 Sector Erase Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 7.4 Write Operation Status Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Figure 7.5 Simultaneous Operation Block Diagram for S29PL256N and S29PL127N . . . . . . . . . . . . . . 41 Figure 7.6 Simultaneous Operation Block Diagram for S29PL129N . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Figure 8.1 Advanced Sector Protection/Unprotection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Figure 8.2 Lock Register Program Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Figure 11.1 Maximum Negative Overshoot Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Figure 11.2 Maximum Positive Overshoot Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Figure 11.3 Test Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Figure 11.4 Input Waveforms and Measurement Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Figure 11.5 VCC Power-Up Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Figure 11.6 Read Operation Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Figure 11.7 Page Read Operation Timings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Figure 11.8 Reset Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Figure 11.9 Program Operation Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Figure 11.10 Accelerated Program Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Figure 11.11 Chip/Sector Erase Operation Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 Figure 11.12 Back-to-back Read/Write Cycle Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 Figure 11.13 Data# Polling Timings (During Embedded Algorithms) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Figure 11.14 Toggle Bit Timings (During Embedded Algorithms) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Figure 11.15 DQ2 vs. DQ6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 |
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