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MB96F348CWAPMC-GE2 Datasheet(PDF) 8 Page - Fujitsu Component Limited. |
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MB96F348CWAPMC-GE2 Datasheet(HTML) 8 Page - Fujitsu Component Limited. |
8 / 159 page MB96300 Series Preliminary Specification 8 FME/EMDC- 2007-02-12 MB96300_shortspec.fm CAN Interface (not available on MB963xxA, MB963xxC) 5 channels 2 channels 2 channels 2 channels 1 channel MB96384R/Y, MB96385R/Y: 1 channel others: 2 channels Supports CAN protocol version 2.0 part A and B ISO16845 certified Bit rates up to 1 Mbit/s 32 message objects Each message object has its own identifier mask Programmable FIFO mode (concatenation of message objects) Maskable interrupt Disabled Automatic Retransmission mode for Time Triggered CAN applications Programmable loop-back mode for self-test operation Stepping Motor Controller 6 channels 5 channels Four high current outputs for each channel Two synchronized 8/10-bit PWMs per channel Internal prescaling for PMW clock: 1, 1/2, 1/4, 1/5, 1/6, 1/8, 1/10, 1/12, 1/16 of peripheral clock External Interrupts 16 channels 15 channels 16 channels 13 channels 10 channels 8 channels Edge sensitive or level sensitive Interrupt mask and pending bit per channel Each available CAN channel RX has an external interrupt for wake-up Selected USART channels SIN have an external interrupt for wake-up Non-Maskable Interrupt 1 channel Disabled after reset Once enabled, can not be disabled other than by reset. Level high or level low sensitive Pin shared with external interrupt 0. Sound Generator 1channel 2 channels 8-bit PWM signal is mixed with tone frequency from 16-bit reload counter PWM clock by internal prescaler: 1, 1/2, 1/4, 1/8, 1/16 of peripheral clock Tone frequency: PWM frequency / 2 / (reload value + 1) LCD Controller 4 COM x 72 SEG 4 COM x 65 SEG Display up to 288 segments Duty cycle: Selectable from options: 1/2, 1/3 and 1/4 Bias: Fixed at 1/3 Frame period: Selectable from three options. (for clock, peripheral clock, subclock or RC oscillator clock is selectable) Driver: Built-in (for internal divider resistors), or external divider resistors Data memory: Built-in 16-byte data memory for display Stop mode: Enable LCD display in the sub-stop mode Blank display: Selectable Pin: All SEG and COM pins can be switched between general and specialized purposes Others: External divided resistors can be also used to shut off the current when LCD is deactivated Features MB96V300 MB9632x MB9634x MB9635x MB9636x MB9638x |
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