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LPC2141 Datasheet(PDF) 10 Page - NXP Semiconductors |
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LPC2141 Datasheet(HTML) 10 Page - NXP Semiconductors |
10 / 39 page LPC2141_42_44_46_48_3 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 03 — 19 October 2007 10 of 39 NXP Semiconductors LPC2141/42/44/46/48 Single-chip 16-bit/32-bit microcontrollers P0.31/UP_LED/ CONNECT 17[6] O P0.31 — General purpose output only digital pin (GPO) O UP_LED — USB GoodLink LED indicator, it is LOW when device is configured (non-control endpoints enabled), it is HIGH when the device is not configured or during global suspend O CONNECT — Signal used to switch an external 1.5 k Ω resistor under the software control, used with the SoftConnect USB feature Important: This is an digital output only pin, this pin MUST NOT be externally pulled LOW when RESET pin is LOW or the JTAG port will be disabled P1.0 to P1.31 I/O Port 1: Port 1 is a 32-bit bidirectional I/O port with individual direction controls for each bit, the operation of port 1 pins depends upon the pin function selected via the pin connect block, pins 0 through 15 of port 1 are not available P1.16/ TRACEPKT0 16[6] I/O P1.16 — General purpose input/output digital pin (GPIO) O TRACEPKT0 — Trace Packet, bit 0, standard I/O port with internal pull-up P1.17/ TRACEPKT1 12[6] I/O P1.17 — General purpose input/output digital pin (GPIO) O TRACEPKT1 — Trace Packet, bit 1, standard I/O port with internal pull-up P1.18/ TRACEPKT2 8[6] I/O P1.18 — General purpose input/output digital pin (GPIO) O TRACEPKT2 — Trace Packet, bit 2, standard I/O port with internal pull-up P1.19/ TRACEPKT3 4[6] I/O P1.19 — General purpose input/output digital pin (GPIO) O TRACEPKT3 — Trace Packet, bit 3, standard I/O port with internal pull-up P1.20/ TRACESYNC 48[6] I/O P1.20 — General purpose input/output digital pin (GPIO) O TRACESYNC — Trace Synchronization, standard I/O port with internal pull-up Note: LOW on this pin while RESET is LOW enables pins P1.25:16 to operate as Trace port after reset P1.21/ PIPESTAT0 44[6] I/O P1.21 — General purpose input/output digital pin (GPIO) O PIPESTAT0 — Pipeline Status, bit 0, standard I/O port with internal pull-up P1.22/ PIPESTAT1 40[6] I/O P1.22 — General purpose input/output digital pin (GPIO) O PIPESTAT1 — Pipeline Status, bit 1, standard I/O port with internal pull-up P1.23/ PIPESTAT2 36[6] I/O P1.23 — General purpose input/output digital pin (GPIO) O PIPESTAT2 — Pipeline Status, bit 2, standard I/O port with internal pull-up P1.24/ TRACECLK 32[6] I/O P1.24 — General purpose input/output digital pin (GPIO) O TRACECLK — Trace Clock, standard I/O port with internal pull-up P1.25/EXTIN0 28[6] I/O P1.25 — General purpose input/output digital pin (GPIO) I EXTIN0 — External Trigger Input, standard I/O with internal pull-up P1.26/RTCK 24[6] I/O P1.26 — General purpose input/output digital pin (GPIO) I/O RTCK — Returned Test Clock output, extra signal added to the JTAG port, assists debugger synchronization when processor frequency varies, bidirectional pin with internal pull-up Note: LOW on RTCK while RESET is LOW enables pins P1.31:26 to operate as Debug port after reset P1.27/TDO 64[6] I/O P1.27 — General purpose input/output digital pin (GPIO) O TDO — Test Data out for JTAG interface Table 3. Pin description …continued Symbol Pin Type Description |
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