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LPC2220 Datasheet(PDF) 11 Page - NXP Semiconductors

Part # LPC2220
Description  16/32-bit ARM microcontrollers; flashless with 64 kB,with 10-bit ADC and external memory interface
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC2220 Datasheet(HTML) 11 Page - NXP Semiconductors

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LPC2210_2220_4
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 04 — 2 October 2007
11 of 49
NXP Semiconductors
LPC2210/2220
16/32-bit ARM microcontrollers with external memory interface
P2.26/D26/
BOOT0
13[5]
F4[5]
I/O
D26 — External memory data line 26.
I
BOOT0 — While RESET is LOW, together with BOOT1
controls booting and internal operation. Internal pull-up
ensures HIGH state if pin is left unconnected.
P2.27/D27/
BOOT1
16[5]
F1[5]
I/O
D27 — External memory data line 27.
I
BOOT1 — While RESET is LOW, together with BOOT0
controls booting and internal operation. Internal pull-up
ensures HIGH state if pin is left unconnected.
BOOT1:0 = 00 selects 8-bit memory on CS0 for boot.
BOOT1:0 = 01 selects 16-bit memory on CS0 for boot.
BOOT1:0 = 10 selects 32-bit memory on CS0 for boot.
BOOT1:0 = 11 selects 16-bit memory on CS0 for boot.
P2.28/D28
17[5]
G2[5]
I/O
D28 — External memory data line 28.
P2.29/D29
18[5]
G1[5]
I/O
D29 — External memory data line 29.
P2.30/D30/
AIN4
19[2]
G3[2]
I/O
D30 — External memory data line 30.
I
AIN4 — ADC, input 4. This analog input is always connected
to its pin.
P2.31/D31/
AIN5
20[2]
G4[2]
I/O
D31 — External memory data line 31.
I
AIN5 — ADC, input 5. This analog input is always connected
to its pin.
P3.0 to P3.31
I/O
Port 3 — Port 3 is a 32-bit bidirectional I/O port with individual
direction controls for each bit. The operation of port 3 pins
depends upon the pin function selected via the Pin Connect
Block.
P3.0/A0
89[5]
G12[5]
O
A0 — External memory address line 0.
P3.1/A1
88[5]
H13[5]
O
A1 — External memory address line 1.
P3.2/A2
87[5]
H12[5]
O
A2 — External memory address line 2.
P3.3/A3
81[5]
J10[5]
O
A3 — External memory address line 3.
P3.4/A4
80[5]
K13[5]
O
A4 — External memory address line 4.
P3.5/A5
74[5]
M13[5]
O
A5 — External memory address line 5.
P3.6/A6
73[5]
N13[5]
O
A6 — External memory address line 6.
P3.7/A7
72[5]
M12[5]
O
A7 — External memory address line 7.
P3.8/A8
71[5]
N12[5]
O
A8 — External memory address line 8.
P3.9/A9
66[5]
M10[5]
O
A9 — External memory address line 9.
P3.10/A10
65[5]
N10[5]
O
A10 — External memory address line 10.
P3.11/A11
64[5]
K9[5]
O
A11 — External memory address line 11.
P3.12/A12
63[5]
L9[5]
O
A12 — External memory address line 12.
P3.13/A13
62[5]
M9[5]
O
A13 — External memory address line 13.
P3.14/A14
56[5]
K7[5]
O
A14 — External memory address line 14.
P3.15/A15
55[5]
L7[5]
O
A15 — External memory address line 15.
P3.16/A16
53[5]
M7[5]
O
A16 — External memory address line 16.
P3.17/A17
48[5]
N5[5]
O
A17 — External memory address line 17.
P3.18/A18
47[5]
M5[5]
O
A18 — External memory address line 18.
Table 4.
Pin description …continued
Symbol
Pin (LQFP)
Pin (TFBGA) Type
Description


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