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MAX3061E Datasheet(PDF) 11 Page - Maxim Integrated Products |
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MAX3061E Datasheet(HTML) 11 Page - Maxim Integrated Products |
11 / 17 page ±15kV ESD-Protected, Fail-Safe, 20Mbps, Slew-Rate- Limited RS-485/RS-422 Transceivers in a SOT ______________________________________________________________________________________ 11 Detailed Description The MAX3060E/MAX3061E/MAX3062E high-speed trans- ceivers for RS-485/RS-422 communication contain one driver and one receiver. These devices feature fail-safe circuitry, which guarantees a logic-high receiver output when the receiver inputs are open or shorted, or when they are connected to a terminated transmission line with all drivers disabled (see the Fail Safe section). All devices have a hot-swap input structure that prevents distur- bances on the differential signal lines when a circuit board is plugged into a hot backplane (see the Hot-Swap Capability section). The MAX3060E features a reduced slew-rate driver that minimizes EMI and reduces reflec- tions caused by improperly terminated cables, allowing error-free data transmission up to 115kbps (see the Reduced EMI and Reflections section). The MAX3061E is also slew-rate limited, transmitting up to 500kbps. The MAX3062E driver is not slew-rate limited, allowing trans- mit speeds up to 20Mbps. The MAX3060E/MAX3061E/ MAX3062E are half-duplex transceivers. All of these parts operate from a single +5V supply. Drivers are output short-circuit current limited. Thermal- shutdown circuitry protects drivers against excessive power dissipation. When activated, the thermal-shut- down circuitry places the driver outputs into a high- impedance state. Receiver Input Filtering The receivers of the MAX3060E and MAX3061E incorpo- rate input filtering in addition to input hysteresis. This fil- tering enhances noise immunity with differential signals that have very slow rise and fall times. Receiver propa- gation delay increases by 2ns due to this filtering. Fail-Safe The MAX3060E family of devices guarantee a logic-high receiver output when the receiver inputs are shorted or open, or when they are connected to a terminated trans- mission line with all drivers disabled. This is done by set- ting the receiver threshold between -50mV and -200mV. If the differential receiver input voltage (A - B) is greater than or equal to -50mV, RO is logic high. If A - B is less than or equal to -200mV, RO is logic low. In the case of a terminated bus with all transmitters dis- abled, the receiver’s differential input voltage is pulled to 0V by the termination. In the case of an unterminated bus with all transmitters disabled, the receiver’s differential input voltage is pulled to 0V by the receiver’s input resis- tors. With the receiver thresholds of the MAX3060E fami- ly, this results in a logic high output with a 50mV minimum input noise margin. Unlike previous fail-safe devices, the -50mV to -200mV threshold complies with the ±200mV EIA/TIA-485 standard. PIN NAME FUNCTION 1RO Receiver Output. When RE is low and when A - B ≥ -50mV, RO is high; if A - B ≤ -200mV, RO is low. RO is high impedance when RE is high. 2 RE Receiver Output Enable. Drive RE low to enable RO; RO is high impedance when RE is high. Drive RE high and DE low to enter low-power shutdown mode. RE is a hot-swap input and reverts to a standard CMOS input after the first low transition. 3DE Driver Output Enable. Drive DE high to enable driver outputs. Driver outputs are high impedance when DE is low. Drive RE high and DE low to enter low-power shutdown mode. DE is a hot-swap input and reverts to a standard CMOS input after the first high transition. 4DI Driver Input. With DE high, a low on DI forces the noninverting output low and the inverting output high. Similarly, a high on DI forces the noninverting output high and the inverting output low. 5 GND Ground 6 A Noninverting Receiver Input and Noninverting Driver Output 7 B Inverting Receiver Input and Inverting Driver Output 8VCC Positive Supply. Bypass with a 0.1µF capacitor to GND. Pin Description |
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