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74LVC1G18GV Datasheet(PDF) 2 Page - NXP Semiconductors |
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74LVC1G18GV Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 13 page 74LVC1G18_2 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 02 — 30 August 2007 2 of 13 NXP Semiconductors 74LVC1G18 1-of-2 non-inverting demultiplexer with 3-state deselected output 4. Marking 5. Functional diagram 6. Pinning information 6.1 Pinning 6.2 Pin description Table 2. Marking Type number Marking code 74LVC1G18GW VW 74LVC1G18GV V18 Fig 1. Logic symbol mnb088 S 1Y 1 6 A 2Y 3 4 Fig 2. Pin configuration 74LVC1G18 S1Y GND A2Y 001aag921 1 2 3 6 VCC 5 4 Table 3. Pin description Symbol Pin Description S 1 data select GND 2 ground (0 V) A 3 data input 2Y 4 data output VCC 5 supply voltage 1Y 6 data output |
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