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ADS6244IRGZT Datasheet(PDF) 10 Page - Texas Instruments |
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ADS6244IRGZT Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 76 page  www.ti.com ADS6245, ADS6244 ADS6243, ADS6242 SLAS542A – MAY 2007 – REVISED JULY 2007 TIMING SPECIFICATIONS (continued) Typical values are at 25 °C, min and max values are across the full temperature range T MIN = –40°C to TMAX = 85°C, AVDD = LVDD = 3.3 V, maximum rated sampling frequency, sine wave input clock, 1.5 VPP clock amplitude, CL = 5 pF , IO = 3.5 mA, RL = 100 Ω , no internal termination, unless otherwise noted. ADS6245 ADS6244 ADS6243 ADS6242 TEST PARAMETER UNIT CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX Time to valid data after coming out of 100 100 100 100 μs global power down Time to valid data after input Wake up time 100 100 100 100 μs clock is re-started Time to valid data after clock coming out of 200 200 200 200 cycles channel standby Data rise From –100 mV tRISE 50 100 200 50 100 200 50 100 200 50 100 200 ps time to +100 mV From +100 mV tFALL Data fall time 50 100 200 50 100 200 50 100 200 50 100 200 ps to –100 mV Bit clock and From –100 mV tRISE Frame clock 50 100 200 50 100 200 50 100 200 50 100 200 ps to +100 mV rise time Bit clock and From +100 mV tFALL Frame clock 50 100 200 50 100 200 50 100 200 50 100 200 ps to –100 mV fall time LVDS Bit clock duty 45% 50% 55% 45% 50% 55% 45% 50% 55% 45% 50% 55% cycle LVDS Frame clock duty 47% 50% 53% 47% 50% 53% 47% 50% 53% 47% 50% 53% cycle 10 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): ADS6245 ADS6244 ADS6243 ADS6242 |
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