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Revision 1.02

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AS1326

Data Sheet - D e t a i l e d D e s c r i p t i o n

Synchronized-PWM Operation

In PWM mode the AS1326A/AS1326B can be synchronized with an external clock (500kHz to 1.2MHz) by applying an

external clock signal to pin CLK/SEL. This synchronization will minimize interference in wireless applications since the

operating frequency can be set to a preferred value. The synchronous rectifier is active during synchronized-PWM

operation.

Synchronous Rectifier

The AS1326A/AS1326B feature an integrated, P-channel synchronous rectifier for enhanced efficiency operation. Syn-

chronous rectification provides 5% improved efficiency over similar non-synchronous boost regulators.

In PWM mode, the synchronous rectifier is turned on during the second half of each switching cycle. In low-power

mode, an internal comparator turns on the synchronous rectifier when the voltage at LX exceeds the boost regulator

output.

Note: While operating with output voltages greater than 4V, an external 0.5A Schottky diode must be connected in

parallel with the P-channel synchronous rectifier.

Low-Voltage Startup Oscillator

The AS1326A/AS1326B contain a CMOS, low-voltage startup oscillator for a 1.1V guaranteed minimum startup input

voltage. At startup, the low-voltage oscillator switches on the N-channel MOSFET until the output voltage reaches

2.15V. With output voltages > 2.15V, the boost-converter feedback and control circuitry are acitvated.

When the AS1326A/AS1326B is in regulation, it can operate down to 0.7V input since internal power for the device is

bootstrapped from the output through pin OUT.

Caution: Do not apply full load until the output > 2.3V.

Shutdown

The AS1326A/AS1326B feature an integrated shutdown mode that reduces quiescent current to 0.1µA. During shut-

down mode (ONN = 1 on AS1326A, ON = 0 on AS1326B), the internal reference and feedback/control circuitry are dis-

abled.

Note: During shutdown, the output voltage is one diode drop below the input voltage.

Reference

The AS1326A/AS1326B contain an internal reference (1.250V ±1%). A 10nF ceramic bypass capacitor must be con-

nected between pins REF and GND. REF can source up to 50µA of external load current.

Note: The bypass capacitor must be placed within 5mm (0.2”) of pin REF.