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DAC8565 Datasheet(PDF) 5 Page - Texas Instruments

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Part # DAC8565
Description  16-Bit, Quad Channel, Ultra-Low Glitch, Voltage Output DIGITAL-TO-ANALOG CONVERTER with 2.5V, 2ppm/째C Internal Reference
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

DAC8565 Datasheet(HTML) 5 Page - Texas Instruments

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PIN CONFIGURATIONS
DAC8565
V
A
OUT
V
B
OUT
V
H/V
OUT
REF
REF
AV
DD
LDAC
ENABLE
RSTSEL
RST
1
2
3
4
16
15
14
13
V
L
REF
GND
V
OUTC
5
6
7
V
OUTD
8
IOV
DD
D
IN
12
11
10 SCLK
SYNC
9
DAC8565
SBAS411A – JUNE 2007 – REVISED NOVEMBER 2007
PW PACKAGE
TSSOP-16
(Top View)
PIN DESCRIPTIONS
PIN
NAME
DESCRIPTION
1
VOUTA
Analog output voltage from DAC A
2
VOUTB
Analog output voltage from DAC B
VREFH/
3
Positive reference input / reference output 2.5V if internal reference used
VREFOUT
4
AVDD
Power supply input, 2.7V to 5.5V
5
VREFL
Negative reference input
6
GND
Ground reference point for all circuitry on the part
7
VOUTC
Analog output voltage DAC C
8
VOUTD
Analog output voltage DAC D
Level-triggered control input (active low). This is the frame synchronization signal for the input data. When SYNC goes
low, it enables the input shift register, and data are sampled on subsequent falling clock edges. The DAC output
9
SYNC
updates following the 24th clock. If SYNC is taken high before the 24th clock edge, the rising edge of SYNC acts as
an interrupt, and the write sequence is ignored by the DAC8565. Schmitt-Trigger logic Input.
10
SCLK
Serial clock input. Data can be transferred at rates up to 50MHz. Schmitt-Trigger logic Input.
Serial data input. Data are clocked into the 24-bit input shift register on each falling edge of the serial clock input.
11
DIN
Schmitt-Trigger logic Input.
12
IOVDD
Digital input-output power supply
Asynchronous reset. Active low. If RST is low, all DAC channels reset either to zero-scale (RSTSEL = 0) or to
13
RST
mid-scale (RSTSEL = 1).
14
RSTSEL
Reset select. If RSTSEL is low, input coding is binary; if high = two's complement.
15
ENABLE
Active low, ENABLE low connects the SPI interface to the serial port
16
LDAC
Load DACs; rising edge triggered, loads all DAC registers
Copyright © 2007, Texas Instruments Incorporated
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