7/16

Command

SDA

LINE

S

T

A

R

T

SLAVE

ADDRESS

10

0

1

R

/

W

W

R

I

T

E

A

C

K

A

C

K

D7

DATA

D0

S

T

O

P

Fig.36 Byte write cycle (BR24L01A/02/04/08/16-W)

A

C

K

WORD

ADDRESS

WA

0

WA

7

*1

*1

A0

A1

A2

*1 As for WA7, BR24L01A-W becomes Don't Care.

*1 As for WA12, BR24L32-W becomes Don't care.

*1 As for WA7, BR24L01A-W becomes Don't care.

*2 As for BR24L01A/L02-W becomes (n+7).

*1 As for WA12, BR24L32-W becomes Don't care.

*1 In BR24L16-W, A2 becomes P2.

*2 In BR24L08-W, BR24L16-W, A1 becomes P1.

*3 In BR24L04-W, A0 becomes PS, and in BR24L08-W

and BR24L16-W, A0 becomes P0.

Note)

Note)

Note)

Fig.37 Byte write cycle (BR24L32/64-W)

SDA

LINE

S

T

A

R

T

SLAVE

ADDRESS

10

0

1

R

/

W

W

R

I

T

E

A

C

K

A

C

K

D7

DATA

D0

S

T

O

P

A

C

K

1st WORD

ADDRESS

2nd WORD

ADDRESS

A

C

K

WA

0

WA

11

WA

12

***

A0

A1

A2

*1

*1

*2

Fig.38 Page write cycle (BR24L01A/02/04/08/16-W)

SDA

LINE

S

T

A

R

T

SLAVE

ADDRESS

10

0

1

R

/

W

W

R

I

T

E

A

C

K

A

C

K

A

C

K

D7

DATA (n)

D0

DATA (n+15)

D0

S

T

O

P

A

C

K

WORD

ADDRESS (n)

WA

0

WA

7

A0

A1

A2

Fig.39 Page write cycle (BR24L32/64-W)

Fig.40 Difference of slave address of each type

SDA

LINE

S

T

A

R

T

SLAVE

ADDRESS

10

0

1

R

/

W

W

R

I

T

E

A

C

K

A

C

K

A

C

K

D7

DATA (n)

D0

DATA (n+31)

D0

S

T

O

P

A

C

K

1st WORD

ADDRESS (n)

2nd WORD

ADDRESS (n)

A

C

K

WA

0

WA

11

WA

12

***

A0

A1

A2

* 1 * 2 * 3

Note)

Note)

Write cycle

Arbitrary data is written to EEPROM. When to write only 1 byte, byte write is normally used, and when to write continuous

data of 2 bytes or more, simultaneous write is possible by page write cycle. The maximum number of write bytes is specified

per device of each capacity.

Up to 32 arbitrary bytes can be written. (In the case of BR24L32 / L64-W)

Data is written to the address designated by word address (n-th address).

By issuing stop bit after 8bit data input, write to memory cell inside starts.

When internal write is started, command is not accepted for tWR (5ms at maximum).

By page write cycle, the following can be written in bulk: Up to 8 bytes (BR24L01A-W, BR24L02-W)

Up to 16 bytes (BR24L04-W, BR24L08-W, BR24L16-W)

Up to 32 bytes (BR 24L32-W, BR24L64-W)

And when data of the maximum bytes or higher is sent, data from the first byte is overwritten.

(Refer to "Internal address increment" of "Notes on page write cycle" in P8/16.)

As for page write cycle of BR24L01A-W and BR24L02-W, after the significant 5 bits (4 significant bits in BR24L01-W) of word

address are designated arbitrarily, and as for page write command of BR24L04-W, BR24L08-W, and BR24L16-W, after page

select bit (PS) of slave address is designated arbitrarily, by continuing data input of 2 bytes or more, the address of

insignificant 4 bits (insignificant 3 bits in BR24L01A-W, and BR24L02-W) is incremented internally, and data up to 16 bytes (up

to 8 bytes in BR24L01A-W and BR24L02-W) can be written.

As for page write cycle of BR24L32-W and BR24L64-W, after the significant 7 bits (in the case of BR24L32-W) of word

address, or the significant 8 bits (in the case of BR24L64-W) of word address are designated arbitrarily, by continuing data

input of 2 bytes or more, the address of insignificant 5 bits is incremented internally, and data up to 32 bytes can be written.