SN75LVDS32, SN75LVDS9637

HIGH-SPEED DIFFERENTIAL LINE RECEIVERS

SLLS360B – JUNE 1999 – REVISED JUNE 2001

6

POST OFFICE BOX 655303

SN75LVDSxxxx electrical characteristics over recommended operating conditions (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

SN75LVDS32,

SN75LVDS9637

UNIT

MIN

TYP†

MAX

VITH+

Positive-going differential input voltage threshold

See Figure 2 and Table 1

100

mV

VITH–

Negative-going differential input voltage threshold‡

See Figure 2 and Table 1

–100

mV

VOH

High-level output voltage

IOH = –8 mA

2.4

V

VOL

Low-level output voltage

IOL = 8 mA

0.4

V

SN75LVDS32

Enabled,

No load

10

18

ICC

Supply current

SN75LVDS32

Disabled

0.25

0.5

mA

SN75LVDS9637

No load

5.5

10

II

Input current (A or B inputs)

VI = 0

–2

–10

–20

µA

II

Input current (A or B inputs)

VI = 2.4 V

– 1.2

–3

µA

II(OFF)

Power-off input current (A or B inputs)

VCC = 0,

VI = 3.6 V

6

20

µA

IIH

High-level input current (G, or G inputs)

VIH = 2 V

10

µA

IIL

Low-level input current (G, or G inputs)

VIL = 0.8 V

10

µA

IOZ

High-impedance output current

VO = 0 or VCC

±10

µA

† All typical values are at TA = 25°C and with VCC = 3.3 V.

‡ The algebraic convention, in which the less positive (more negative) limit is designated minimum, is used in this data sheet for the negative-going

differential input voltage threshold only.

SN75LVDSxxxx switching characteristics over recommended operating conditions (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

SN75LVDS32,

SN75LVDS9637

UNIT

MIN

TYP†

MAX

tpLH

Propagation delay time, low-to-high-level output

2.1

6

ns

tpHL

Propagation delay time, high-to-low-level output

2.1

6

ns

tsk(p)

Pulse skew (|tPHL – tPLH|)

0.6

1.5

ns

tsk(o)

Channel-to-channel output skew†

CL = 100 pF, See Figure 3

0.7

1.5

ns

tsk(pp)

Part-to-part skew‡

0.6

ns

tr

Output signal rise time, 20% to 80%

0.6

ns

tf

Output signal fall time, 80% to 20%

1

ns

tpHZ

Propagation delay time, high-level-to-high-impedance output

25

ns

tpLZ

Propagation delay time, low-level-to-high-impedance output

See Figure 4

25

ns

tpZH

Propagation delay time, high-impedance-to-high-level output

See Figure 4

25

ns

tpZL

Propagation delay time, high-impedance-to-low-level output

25

ns

† All typical values are at 25

°C and with a 3.3-V supply.

‡ tsk(p) is the magnitude of the time difference between the high-to-low and low-to-high propagation delay times at an output

§ tsk(o) is the magnitude of the time difference between the outputs of a single device with all of their inputs connected together.

¶ tsk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate

with the same supply voltages, same temperature, and have identical packages and test circuits.