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SN75LVDS32DR Datasheet(PDF) 10 Page - Texas Instruments |
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SN75LVDS32DR Datasheet(HTML) 10 Page - Texas Instruments |
10 / 19 page SN75LVDS32, SN75LVDS9637 HIGH-SPEED DIFFERENTIAL LINE RECEIVERS SLLS360B – JUNE 1999 – REVISED JUNE 2001 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 APPLICATION INFORMATION using an LVDS receiver with RS-422 data Receipt of data from a TIA/EIA-422 line driver may be accomplished using a TIA/EIA-644 line receiver with the addition of an attenuator circuit. This technique gives the user a very high-speed and low-power 422 receiver. If the ground noise between the transmitter and receiver is not a concern (less than ±1 V), the answer can be as simple as shown below in Figure 5. The use of a resistor divider circuit in front of the LVDS receiver attenuates the 422 differential signal to LVDS levels. The resistors present a total differential load of 100 Ω to match the characteristic impedance of the transmission line and to reduce the signal 10:1. The maximum 422 differential output signal or 6 V is reduced to 600 mV. The high input impedance of the LVDS receiver prevents input bias offsets and maintains a better than 200-mV differential input voltage threshold at the inputs to the divider. This circuit is used in front of each LVDS channel that also receives 422 signals. R1 45.3 Ω R2 45.3 Ω R3 5.11 Ω R4 5.11 Ω A B Y ’LVDS32 NOTE A: The components used were standard values. R1, R2 = NRC12F45R3TR, NIC Components, 45.3 Ohm, 1/8W, 1%, 1206 Package R3, R4 = NRC12F5R11TR, NIC Components, 5.11 Ohm, 1/8W, 1%, 1206 Package The resistor values do not need to be 1% tolerance. However, it can be difficult locating a supplier of resistors having values less than 100 Ω in stock and readily available. The user may find other suppliers with comparable parts having tolerances of 5% or even 10%. These parts are adequate for use in this circuit. Figure 5. RS-422 Data Input to an LVDS Receiver Under Low Ground Noise Conditions If ground noise between the RS-422 driver and LVDS receiver is a concern, then the common-mode voltage must be attenuated. The circuit must then be modified to connect the node between R3 and R4 to the LVDS receiver ground. This modification to the circuit increases the common-mode voltage from ±1 V to greater than ±4.5 V. |
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