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TMP91FY28 Datasheet(PDF) 10 Page - Toshiba Semiconductor |
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TMP91FY28 Datasheet(HTML) 10 Page - Toshiba Semiconductor |
10 / 60 page TMP91FY28 2004-02-12 91FY28-8 Under development Table 2.2.4 Pin Names and Functions (4/4) Pin name Number of Pins I/O Function P94 RXD 1 I/O Input Port 94: Programmable as input or output Serial receive data P95 SCLK CTS 1 I/O I/O Input Port 95: Programmable as input or output Serial clock input/output Serial clear-to-send P96 1 I/O Port96: Programmable as input or output PA0 to PA3 INT1 to INT4 4 I/O Input Ports A0 to A3: Individually programmable as input or output (with internal pull-up resistor) Interrupt request 1 to 4: Individually programmable to be rising-edge or falling-edge sensitive PA4 to PA7 4 I/O Port A4 to A7: Programmable as input or output (with internal pull-up resistor) WAKE 1 Output STOP mode monitor output This pin drives low when the CPU is operating; the pin is in high-impedance state during reset or in STOP mode. ALE 1 Output Address latch enable (This pin can be disabled in order to reduce noise.) NMI 1 Input Non maskable interrupt request: Causes an NMI interrupt on the falling edge. Programmable to be rising-edge sensitive. AM0 to AM1 2 Input Both AM0 and AM1 should be held at logic 1. EMU0 1 Output Test pin. This pin should be left open. EMU1 1 Output Test pin. This pin should be left open. RESET 1 Input Reset (with internal pull-up resistor): Initializes the whole TMP91FY28. VREFH 1 Input Input pin for high reference voltage for the AD converter. VREFL 1 Input Input pin for low reference voltage for the AD converter. AVCC 1 Power supply pin for the AD converter. AVSS 1 Ground pin for the AD converter. X1/X2 2 I/O Connection pins for an oscillator crystal DVCC DVSS 3 3 Power supply pins. The DVCC pins should be connected to power supply. Ground pins. The DVSS pins should be connected to ground. Note: All pins that have built-in pull-up resistors (Other than the RESET pin) can be disconnected from the built-in pull-up resistor by software. |
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