SN54ABT16823, SN74ABT16823

18-BIT BUS-INTERFACE FLIP-FLOPS

WITH 3-STATE OUTPUTS

SCBS217C – JUNE 1992 – REVISED JANUARY 1997

7

POST OFFICE BOX 655303

timing requirements over recommended ranges of supply voltage and operating free-air

temperature (unless otherwise noted) (see Figure 1)

VCC = 5 V,

TA = 25°C

SN54ABT16823

SN74ABT16823

UNIT

MIN

MAX

MIN

MAX

MIN

MAX

fclock

Clock frequency

0

150

0

150

0

150

MHz

t

Pulse duration

CLR low

3.3

3.3

3.3

ns

tw

Pulse duration

CLK high or low

3.3

3.3

3.3

ns

↑

CLR inactive

1.6

2

1.6

tsu

Setup time before CLK

↑

Data

1.7

1.7

1.7

ns

CLKEN low

2.8

2.8

2.8

th

Hold time after CLK

↑

Data

1.2

1.2

1.2

ns

th

Hold time after CLK

↑

CLKEN low

0.6

0.6

0.6

ns

switching characteristics over recommended ranges of supply voltage and operating free-air

SN54ABT16823

PARAMETER

FROM

(INPUT)

TO

(OUTPUT)

VCC = 5 V,

TA = 25°C

MIN

MAX

UNIT

MIN

TYP

MAX

fmax

150

150

MHz

tPLH

CLK

Q

1.6

3.9

5.5

1.6

7.7

ns

tPHL

CLK

Q

2.1

3.9

5.4

2.1

6.4

ns

tPHL

CLR

Q

1.9

4.1

5.3

1.9

6.3

ns

tPZH

OE

Q

1

3.1

4.2

1

5.1

ns

tPZL

OE

Q

1.5

3.5

4.6

1.5

5.7

ns

tPHZ

OE

Q

2.2

4.3

6

2.2

6.8

ns

tPLZ

OE

Q

1.6

4.3

6.4

1.6

9.9

ns

switching characteristics over recommended ranges of supply voltage and operating free-air

SN74ABT16823

PARAMETER

FROM

(INPUT)

TO

(OUTPUT)

VCC = 5 V,

TA = 25°C

MIN

MAX

UNIT

MIN

TYP

MAX

fmax

150

150

MHz

tPLH

CLK

Q

1.6

3.9

5.5

1.6

6.8

ns

tPHL

CLK

Q

2.1

3.9

5.4

2.1

6

ns

tPHL

CLR

Q

1.9

4.1

5.3

1.9

6.1

ns

tPZH

OE

Q

1

3.1

4.2

1

4.9

ns

tPZL

OE

Q

1.5

3.5

4.6

1.5

5.5

ns

tPHZ

OE

Q

2.2

4.3

5.6

2.2

6.1

ns

tPLZ

OE

Q

1.6

4.3

6.4

1.6

8.7

ns