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NCP1015 Datasheet(PDF) 9 Page - ON Semiconductor |
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NCP1015 Datasheet(HTML) 9 Page - ON Semiconductor |
9 / 22 page NCP1015 http://onsemi.com 9 Figure 15. NCP1015 Facing a Fault Condition (Vin = 150 Vdc) Tstart Tsw TLatch 1 V Ripple Latch-off Level The rising slope from the latch-off level up to 8.5 V is expressed by: P DSS + Vin @ ICC1 tstart + D V1 @ C IC1 The time during which the IC actually pulses is given by: tsw + D V2 @ C ICC1 Finally, the latch-off time can be derived using the same formula topology: t latch + DV3 @ C ICC2 From these three definitions, the burst duty-cycle D can be computed: D + tsw tstart ) tsw ) tlatch (eq. 2) D + DV2 ICC1 @ DV2 ICC1 ) DV1 IC1 ) DV3 ICC2 (eq. 3) Feeding the equation with values extracted from the parameter section gives a typical duty-cycle D of 13%, precluding any lethal thermal runaway while in a fault condition. DSS Internal Dissipation The Dynamic Self-Supplied pulls the energy out from the drain pin. In the Flyback-based converters, this drain level can easily go above 600 V peak and thus increase the stress on the DSS startup source. However, the drain voltage evolves with time and its period is small compared to that of the DSS. As a result, the averaged dissipation, excluding capacitive losses, can be derived by: P DSS + ICC1 @t VDS(t) u (eq. 4) Figure 16 shows a typical drain-ground wave-shape where leakage effects have been removed: Figure 16. A Typical Drain-ground Waveshape where Leakage Effects are Not Accounted for Vds(t) Vin Vr toff dt ton t Tsw By looking at Figure 16 the average result can easily be derived by additive square area calculation: t V DS(t) u+ Vin @ (1 * D) ) Vr @ t off tsw (eq. 5) By developing Equation 5 we obtain: t V DS(t) u+ Vin * Vin @ ton tsw ) Vr @ t off tsw (eq. 6) toff can be expressed by: t off + Ip @ Lp Vr (eq. 7) ton can be evaluated by: ton + Ip @ Lp V in (eq. 8) |
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