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BQ24123 Datasheet(PDF) 4 Page - Texas Instruments |
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BQ24123 Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 36 page  www.ti.com bq24120 bq24123 bq24125 SLUS688E – MARCH 2006 – REVISED DECEMBER 2007 ELECTRICAL CHARACTERISTICS (continued) TJ = 0°C to 125°C and recommended supply voltage range (unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Charge termination detection set voltage, VTERM VI(BAT) > VOREG- VRCH 100 mV ISET2 K(ISET2) Termination current set factor 1000 V/A Charger termination accuracy VI(BAT) > VOREG- VRCH –20% 20% Both rising and falling, tdg-TERM Deglitch time for charge termination 20 30 40 ms 2-mV overdrive tRISE, tFALL = 100 ns TEMPERATURE COMPARATOR AND VTSB BIAS REGULATOR VLTF Cold temperature threshold, TS 72.8 73.5 74.2 VHTF Hot temperature threshold, TS Initiate Charge 33.7 34.4 35.1 %VO(VTSB) VTCO Cutoff temperature threshold, TS During Charge 28.7 29.3 29.9 LTF hysteresis 0.5 1.0 1.5 Both rising and falling, tdg-TS Deglitch time for temperature fault, TS 20 30 40 ms 2-mV overdrive tRISE, tFALL = 100 ns VCC > VIN(min), VO(VTSB) TS bias output voltage 3.15 V I(VTSB) = 10 mA 0.1 µF ≤ CO(VTSB) ≤ 1 µF VCC > IN(min), VO(VTSB) TS bias voltage regulation accuracy –10% 10% I(VTSB) = 10 mA 0.1 µF ≤ CO(VTSB) ≤ 1 µF BATTERY RECHARGE THRESHOLD VRCH Recharge threshold voltage Below VOREG 75 100 125 mV/cell VI(BAT) < decreasing below threshold, tdg-RCH Deglitch time 20 30 40 ms tFALL = 100 ns 10-mV overdrive STAT1, STAT2, AND PG OUTPUTS VOL(STATx) Low-level output saturation voltage, STATx IO = 5 mA 0.5 V VOL(PG) Low-level output saturation voltage, PG IO = 10 mA 0.1 CE , CELLS INPUTS VIL Low-level input voltage IIL = 5 µA 0 0.4 V VIH High-level input voltage IIH = 20 µA 1.3 VCC TTC INPUT tPRECHG Precharge timer 1440 1800 2160 s tCHARGE Programmable charge timer range t(CHG) = C(TTC) × K(TTC) 25 572 minutes Charge timer accuracy 0.01 µF ≤ C (TTC) ≤ 0.18 µF -10% 10% KTTC Timer multiplier 2.6 min/nF CTTC Charge time capacitor range 0.01 0.22 µF VTTC_EN TTC enable threshold voltage V(TTC) rising 200 mV SLEEP COMPARATOR VCC ≤ VIBAT VCC ≤ VIBAT 2.3 V ≤ VI(OUT) ≤ VOREG, for 1 or 2 cells +5 mV +75 mV VSLP-ENT Sleep-mode entry threshold V VI(OUT) = 12.6 V, RIN = 1kΩ, VCC ≤ VIBAT VCC ≤ VIBAT bq24125(2) –4 mV +73 mV VSLP-EXIT Sleep-mode exit hysteresis, 2.3 V ≤ VI(OUT)≤ VOREG 40 160 mV VCC decreasing below threshold, tFALL = 100 ns, 10-mV overdrive, 5 µs PMOS turns off tdg-SLP Deglitch time for sleep mode VCC decreasing below threshold, tFALL = 100 ns, 10-mV overdrive, 20 30 40 ms STATx pins turn off UVLO VUVLO-ON IC active threshold voltage VCC rising 3.15 3.30 3.50 V IC active hysteresis VCC falling 120 150 mV (2) For bq24125 only. RIN is connected between IN and PGND pins and needed to ensure sleep entry. 4 Submit Documentation Feedback Copyright © 2006–2007, Texas Instruments Incorporated Product Folder Link(s): bq24120 bq24123 bq24125 |
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