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SSM6L05FU Datasheet(PDF) 7 Page - Toshiba Semiconductor |
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SSM6L05FU Datasheet(HTML) 7 Page - Toshiba Semiconductor |
7 / 8 page SSM6L05FU 2007-11-01 7 Q2 (Pch MOS FET) Drain-Source voltage VDS (V) IDR – VDS Drain-Source voltage VDS (V) C – VDS Drain current ID (mA) t – ID Ambient temperature Ta (°C) PD* – Ta *: Total rating 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 −100 −200 −300 −400 −500 Common Source VGS = 0 Ta = 25°C IDR G D S 1 −0.1 −0.3 −1 −3 −10 −30 3 5 10 30 50 100 Common Source VGS = 0 f = 1 MHz Ta = 25°C Ciss Coss Crss 10 −1 −3 −10 −30 −100 −300 30 50 100 300 500 1000 Common Source VDD = −3 V VGS = 0~−2.5 V Ta = 25°C toff tf ton tr 0 0 20 40 60 80 100 120 140 160 100 200 300 400 Mounted on FR4 board. (25.4 mm × 25.4 mm × 1.6 t Cu Pad: 0.32 mm 2 × 6) |
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