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TA48S00AF Datasheet(PDF) 5 Page - Toshiba Semiconductor |
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TA48S00AF Datasheet(HTML) 5 Page - Toshiba Semiconductor |
5 / 10 page TA48S00AF 2007-06-06 5 Electrical Characteristics Common to All Products • Tj = 25°C in the measurement conditions of each item is the standard condition when a pulse test is carried out, and any drift in the electrical characteristic due to a rise in the junction temperature of the chip may be disregarded. Standard Application Circuit • Be sure to connect a capacitor near the input terminal and output terminal between both terminals and GND. The use of a monolithic ceramic capacitor (B Characteristic or X7R) of low ESR (equivalent series resistance) is recommended. The IC may oscillate due to external conditions (output current, temperature, or the type of the capacitor used). The type of capacitor required must be determined by the actual application circuit in which the IC is used. Setting Output Voltage • The output voltage is determined by the equation shown below. When you control the output voltage with R1, a recommended value to use for R2 is 5 k Ω. R1 and R2 must be placed as close as possible to each other, and the board trace to the ADJ terminal must be kept as short as possible. ) R2 R1 + 1 ( × REF V = OUT V The notice in case of application • The IC might be destroyed if a voltage greater than the input terminal voltage is applied to the output terminal, or if the input terminal is connected to GND during operation. To prevent such an occurrence, connect a diode as in the following diagram. • There is a possibility that internal parasitic devices may be generated when momentary transients cause a terminal’s potential to fall below that of the GND terminal. In such case, that the device could be destroyed. The voltage of each terminal and any state must therefore never fall below the GND potential. • Depending on the load conditions, a steep increase in the input voltage applied (VIN) may cause a momentary rise in output voltage (VOUT) even if the EN (enable) pin is Low. Treat with care. CIN 0.33 μF IN OUT EN ADJ GND CPU etc. Load COUT 3.3 μF TA48S00AF R1 R2 CIN 0.33 μF IN OUT EN ADJ GND CPUetc. Load COUT 3.3 μF TA48S00AF R1 R2 |
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