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P11C68-CGDCBS Datasheet(PDF) 4 Page - Zarlink Semiconductor Inc |
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P11C68-CGDCBS Datasheet(HTML) 4 Page - Zarlink Semiconductor Inc |
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4 / 17 page  P10C68/P11C68 4 Characteristic Average power supply current Average power supply current during STORE cycle Average power supply current (standby, cycling TTL input levels) Average power supply current (standby, stable CMOS input levels) Input leakage current (any input) Off state output leakage current Output logic '1' voltage Output voltage '0' voltage Industrial temperature range Test conditions (unless otherwise stated): Tamb = -40˚C to 70˚C, Vcc = +5V ± 10% (See notes 4, 5 and 6) Symbol ICC1 ICC2 ISB1 ISB2 IILK IOLK VOH VOL Value Units mA mA mA mA mA mA µA µA V V Conditions tAVAV = 35ns tAVAV = 45ns All inputs at VIN ≤ 0.2V tAVAV = 35ns tAVAV = 45ns E(bar) ≥VIH, all other inputs cycling E (bar)≥(VCC -0.2V), all other inputs at VIN≤0.2V or ≥(VCC - 0.2V) VCC = max, VIN = VSS to VCC VCC = max, VIN = VSS to VCC IOUT = 4mA IOUT = 8mA Max. 80 75 50 27 23 1 ±1 ±5 0.4 Min. 2.4 Input pulse levels Input rise and fall times Input and output timing reference levels Output load VSS to 3V ≤5ns 1.5V See Figure 3 AC TEST CONDITIONS CAPACITANCE Tamb = 25°C, f = 1.0MHz (see note 7) Parameter Input capacitance Output capacitance Symbol CIN COUT Units pF pF Max. 5 7 Conditions ∆V=0 to 3V ∆V=0 to 3V NOTE 7. These parameters are characterised but not 100% tested. NOTES 4. ICC1 is dependent on output loading and cycle rate. The specified values are obtained with outputs unloaded. 5. Bringing E (bar) ≥ VIH will not produce standby currents levels until any non-volatile cycle in progress has timed out. See Mode Selection table. 6. ICC2 is the average current required for the duration of the STORE cycle (tSTORE) after the sequence that initiates the cycle. 5.0V 480 Ohms 30p INCLUDING SCOPE AND FIXTURE 255 Ohms OUTPUT Figure 3. AC output loading. |
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