P10C68/P11C68

6

WRITE CYCLE 1 : W (BAR) CONTROLLED

(See notes 8 and 13)

Commercial and Industrial Temperature Range

W

DATA VALID

STANDBY

ACTIVE

DQ (DATA OUT)

ADDRESS

E

G

Standard

Alternative

Parameter

Write cycle time

Write pulse width

Chip enable to end of write

Data set-up to end of write

Data hold after end of write

Address set-up to end of write

Address set-up to start of write

Address hold after end of write

Write enable to output disable

Output active after end of write

Units

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

Notes

11, 14

P10C68-45

P11C68-45

P10C68-35

P11C68-35

Symbol

Min.

45

35

35

30

0

35

0

0

5

Max.

35

Min.

45

35

35

30

0

35

0

0

5

Max.

35

NOTES

13.

E (bar) or W (bar) must be ≥ VIH during address transitions.

14.

If W (bar) is low when E (bar) goes low, the outputs remain in the high impedance state.