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TB62710F Datasheet(PDF) 2 Page - Toshiba Semiconductor |
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TB62710F Datasheet(HTML) 2 Page - Toshiba Semiconductor |
2 / 19 page TB62710P/F/FN 2006-06-14 2 Pin Assignment (top view) Block Diagram Truth Table CLOCK LATCH ENABLE SERIAL-IN OUT0… OUT5 … OUT7 SERIAL-OUT H L Dn Dn … Dn − 5 … Dn − 7 Dn − 7 L L Dn + 1 No Change Dn − 6 H L Dn + 2 Dn + 2 … Dn − 3 … Dn − 5 Dn − 5 X L Dn + 3 Dn + 2 … Dn − 3 … Dn − 5 Dn − 5 X H Dn + 3 OFF Dn − 5 Note 1: OUT0~OUT7 = ON when Dn = “H”; OUT0~OUT7 = OFF when Dn = “L”. In order to ensure that the level of the power supply voltate is correct, an external resistor must be connected between R-EXT and GND. GND SERIAL-IN LATCH CLOCK NC VCC OUT0 OUT1 VDD R-EXT SERIAL-OUT1 ENABLE SERIAL-OUT2 VCC OUT7 OUT6 P- & FN-types OUT2 OUT5 OUT3 OUT4 GND SERIAL-IN LATCH CLOCK NC VCC OUT0 OUT1 VDD R-EXT SERIAL-OUT1 ENABLE SERIAL-OUT2 NC OUT7 OUT6 F-type OUT2 OUT5 OUT3 OUT4 NC NC NC VCC SERIAL-IN LATCH R-EXT ENABLE I-REG Q ST D Q ST D D Q CK Q ST D D Q CK D Q CK CLOCK OUT0 OUT1 OUT7 SERIAL-OUT1 VCC VCC VCC D Q CK SERIAL-OUT2 |
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