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TB62726AN Datasheet(PDF) 2 Page - Toshiba Semiconductor |
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TB62726AN Datasheet(HTML) 2 Page - Toshiba Semiconductor |
2 / 18 page TB62726AN/AF 2006-06-14 2 Pin Assignment (top view) Warnings: Short-circuiting an output terminal toGND or to the power supply terminal may broken the device. Please take care when wiring the output terminals, the power supply terminal and the GND terminals. Block Diagram Truth Table CLOCK LATCH ENABLE SERIAL-IN OUT0 … OUT7 … OUT15 SERIAL-OUT H L Dn Dn … Dn − 7 … Dn − 15 Dn − 15 L L Dn + 1 No change Dn − 14 H L Dn + 2 Dn + 2 … Dn − 5 … Dn − 13 Dn − 13 X L Dn + 3 Dn + 2 … Dn − 5 … Dn − 13 Dn − 13 X H Dn + 3 OFF Dn − 13 Note 1: OUT0 to OUT15 = On when Dn = H; OUT0 to OUT15 = Off when Dn = L. In order to ensure that the level of the power supply voltage is correct, an external resistor must be connected between R-EXT and GND. GND SERIAL-IN LATCH CLOCK OUT0 OUT1 OUT2 OUT3 VDD R-EXT SERIAL-OUT ENABLE OUT15 OUT14 OUT13 OUT12 OUT4 OUT5 OUT6 OUT7 OUT11 OUT10 OUT9 OUT8 SERIAL-IN LATCH OUT0 R-EXT ENABLE I-REG Q ST D Q ST D D Q CK Q ST D D Q CK D Q CK CLOCK OUT1 OUT15 SERIAL-OUT |
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