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L6741TR Datasheet(PDF) 11 Page - STMicroelectronics |
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L6741TR Datasheet(HTML) 11 Page - STMicroelectronics |
11 / 16 page L6741 Device description and operation 11/16 5.6 Layout guidelines L6741 provides driving capability to implement high-current step-down DC-DC converters. The first priority when placing components for these applications has to be reserved to the power section, minimizing the length of each connection and loop as much as possible. To minimize noise and voltage spikes (also EMI and losses) power connections must be a part of a power plane and anyway realized by wide and thick copper traces: loop must be anyway minimized. The critical components, such as the power MOSFETs, must be close one to the other. However, some space between the power MOSFET is still required to assure good thermal cooling and airflow. Traces between the driver and the MOSFETS should be short and wide to minimize the inductance of the trace so minimizing ringing in the driving signals. Moreover, VIAs count needs to be minimized to reduce the related parasitic effect. The use of multi-layer printed circuit board is recommended. Small signal components and connections to critical nodes of the application as well as bypass capacitors for the device supply are also important. Locate the bypass capacitor (VCC, PVCC and BOOT capacitors) close to the device with the shortest possible loop and use wide copper traces to minimize parasitic inductance. Systems that do not use Schottky diodes in parallel to the Low-Side MOSFET might show big negative spikes on the phase pin. This spike can be limited as well as the positive spike but has an additional consequence: it causes the bootstrap capacitor to be over-charged. This extra-charge can cause, in the worst case condition of maximum input voltage and during particular transients, that boot-to-phase voltage overcomes the abs.max.ratings also causing device failures. It is then suggested in this cases to limit this extra-charge by adding a small resistor RBOOT in series to the boot capacitor. The use of RBOOT also contributes in the limitation of the spike present on the BOOT pin. For heat dissipation, place copper area under the IC. This copper area may be connected with internal copper layers through several VIAs to improve the thermal conductivity. The combination of copper pad, copper plane and VIAs under the driver allows the device to reach its best thermal performances. Figure 7. Driver turn-on and turn-off paths RGATE RINT CGD CGS CDS VCC LS DRIVER LS MOSFET GND LGATE RGATE RINT CGD CGS CDS BOOT HS DRIVER HS MOSFET PHASE HGATE VCC RBOOT CBOOT RBOOT CBOOT |
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