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LT6106HS5TRMPBF Datasheet(PDF) 9 Page - Linear Technology |
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LT6106HS5TRMPBF Datasheet(HTML) 9 Page - Linear Technology |
9 / 12 page LT6106 9 6106fa APPLICATIONS INFORMATION Output Error Due to the Amplifier DC Offset Voltage, VOS EV R R OUT VOS OS OUT IN () • = The DC offset voltage of the amplifier adds directly to the value of the sense voltage, VSENSE. This is the dominant error of the system and it limits the low end of the dynamic range. The paragraph “Selection of External Current Sense Resistor” provides details. Output Error Due to the Bias Currents, IB+ and IB– The bias current IB+ flows into the positive input of the internal op amp. IB– flows into the negative input. E OUT(IBIAS) = ROUT IB + • R SENSE R IN –I B – ⎛ ⎝⎜ ⎞ ⎠⎟ Assuming IB+ ≅ IB– = IBIAS, and RSENSE << RIN then: EOUT(IBIAS) ≅ –ROUT • IBIAS It is convenient to refer the error to the input: EIN(IBIAS) ≅ –RIN • IBIAS For instance if IBIAS is 60nA and RIN is 1k, the input referred error is 60μV. Note that in applications where RSENSE ≅ RIN, IB+ causes a voltage offset in RSENSE that cancels the error due to IB– and EOUT(IBIAS) ≅ 0mV. In most applica- tions, RSENSE << RIN, the bias current error can be similarly reduced if an external resistor RIN+ = (RIN – RSENSE) is connected as shown in Figure 4. Under both conditions: EIN(IBIAS) = ±RIN • IOS; where IOS = IB+ – IB– If the offset current, IOS, of the LT6106 amplifier is 6nA, the 60μV error above is reduced to 6μV. Adding RIN+ as described will maximize the dynamic range of the circuit. For less sensitive designs, RIN+ is not necessary. Output Error Due to Gain Error The LT6106 exhibits a typical gain error of –0.25% at 1mA output current. The primary source of gain error is due to the finite gain to the PNP output transistor, which results in a small percentage of the current in RIN not appearing in the output load ROUT. Minimum Output Voltage The curves of the Output Voltage vs Input Sense Voltage show the behavior of the LT6106 with low input sense volt- ages. When VSENSE = 0V, the output voltage will always be slightly positive, the result of input offset voltages and of a small amount of quiescent current (0.7μA to 1.2μA) flowing through the output device. The minimum output voltage in the Electrical Characteristics table include both these effects. Power Dissipation Considerations The power dissipated by the LT6106 will cause a small increase in the die temperature. This rise in junction tem- perature can be calculated if the output current and the supply current are known. The power dissipated in the LT6106 due to the output signal is: POUT = (VIN– – VOUT) • IOUT Since VIN– ≅ V+, POUT ≅ (V+ – VOUT) • IOUT The power dissipated due to the quiescent supply current is: PQ = IS • (V+ – V–) The total power dissipated is the output dissipation plus the quiescent dissipation: PTOTAL = POUT + PQ The junction temperature is given by: TJ = TA + θJA • PTOTAL At the maximum operating supply voltage of 36V and the maximum guaranteed output current of 1mA, the total Figure 4. Second Input R Minimizes Error Due to Input Bias Current LT6106 ROUT VOUT 6106 F04 RIN – RIN + V+ LOAD RSENSE V+ V– OUT RIN + = RIN– – RSENSE –IN +IN |
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