M25PE16-VMP6TG datasheet(5/56 Pages) STMICROELECTRONICS

Part #	M25PE16-VMP6TG

Description	16 Mbit, low-voltage, Page-Erasable Serial Flash memory with byte-alterability, 50 MHz SPI bus, standard pinout

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Manufacturer	STMICROELECTRONICS [STMicroelectronics]

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5 / 56 page

M25PE16

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Figure 1.

Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 2.

VFQFPN and SO connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 3.

Bus Master and memory devices on the SPI Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 4.

SPI modes supported . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 5.

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 6.

Write Enable (WREN) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 7.

Write Disable (WRDI) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 8.

Read Identification (RDID) instruction sequence and data-out sequence . . . . . . . . . . . . . 24

Figure 9.

Read Status Register (RDSR) instruction sequence and data-out sequence . . . . . . . . . . 26

Figure 10.

Write Status Register (WRSR) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 11.

Read Data Bytes (READ) instruction sequence and data-out sequence . . . . . . . . . . . . . . 29

Figure 12.

Read Data Bytes at Higher Speed (FAST_READ) instruction sequence

and data-out sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Figure 13.

Read Lock Register (RDLR) instruction sequence

and data-out sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Figure 14.

Page Write (PW) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Figure 15.

Page Program (PP) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Figure 16.

Write to Lock Register (WRLR) instruction sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Figure 17.

Page Erase (PE) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Figure 18.

Sector Erase (SE) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Figure 19.

SubSector Erase (SSE) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Figure 20.

Bulk Erase (BE) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Figure 21.

Deep Power-down (DP) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Figure 22.

Release from Deep Power-down (RDP) instruction sequence . . . . . . . . . . . . . . . . . . . . . . 42

Figure 23.

Power-up timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Figure 24.

AC measurement I/O waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Figure 25.

Serial input timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Figure 26.

Write Protect setup and hold timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Figure 27.

Output timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Figure 28.

Reset AC waveforms while a program or erase cycle is in progress . . . . . . . . . . . . . . . . . 51

Figure 29.

VFQFPN8 (MLP8) 8-lead Very thin Dual Flat Package No lead, 6 × 5mm,

package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

Figure 30.

SO8 wide – 8 lead Plastic Small Outline, 208 mils body width, package outline . . . . . . . . 53

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M25PE16-VMP6TG Datasheet(PDF) 5 Page - STMicroelectronics

M25PE16-VMP6TG Datasheet(HTML) 5 Page - STMicroelectronics

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