SN74ACT2226, SN74ACT2228

DUAL 64

× 1, DUAL 256 × 1

CLOCKED FIRST-IN, FIRST-OUT MEMORIES

SCAS219C – JUNE 1992 – REVISED OCTOBER 1997

11

POST OFFICE BOX 655303

TYPICAL CHARACTERISTICS

0

2

4

6

8

10

12

14

16

18

0

5

10

15

20

25

SINGLE FIFO SUPPLY CURRENT

vs

CLOCK FREQUENCY

fclock – Clock Frequency – MHz

fI = 1/2 fclock

TA = 75°C

CL = 0 pF

VCC = 5.5 V

VCC = 5 V

VCC = 4.5 V

Figure 5

calculating power dissipation

Data for Figure 5 is taken with one FIFO active and one FIFO idle on the device. The active FIFO has both writes

and reads enabled with its read clock (RDCLK) and write clock (WRTCLK) operating at the rate specified by

close approximation of the total device power can be found by using Figure 5, determining the capacitive load

on the data output and determining the number of SN74ACT2226/2228 inputs driven by TTL high levels.

SN74ACT2228 can be calculated by:

where:

N

= number of inputs driven by TTL levels

dc

= duty cycle of inputs at a TTL high level of 3.4 V

= output capacitive load

= switching frequency of an output