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PI74LVTCH16244 Datasheet(PDF) 2 Page - Pericom Semiconductor Corporation |
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PI74LVTCH16244 Datasheet(HTML) 2 Page - Pericom Semiconductor Corporation |
2 / 7 page 2 PS8650B 06/05/06 PI74LVTCH16244 3.3V 16-Bit Buffer/Line Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Supply voltage range, VCC .............................. –0.5V to+6.5V Input voltage range, VI(1) ................................. –0.5V to+6.5V Voltage range applied to any output in the high-impedance or power-off state, VO(1) ........ –0.5V to+6.5V Voltage range applied to any output in the active state, VO(1,2) .................................... –0.5VtoVCC+0.5V Input clamp current, IIK (VI <0) ..................................... –50mA Output clamp current, IOK (VO <0) ............................... –50mA Continous Output Current IO ....................................... ±50mA ContinousCurrentthrougheachVCCorGNDpin .............. ±100mA Package thermal impedance, θJA(3) ............................ 104°C/W Storage Temperature range, Tstg ..................... –65°Cto150°C 1. Input negative-voltage and output voltage ratings may be ex- ceeded if the input and output clamp current ratings are observed. 2. This value is limited to 6.5V maximum. 3. The package thermal impedance is calculated in accordance with JESD51. Notes: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. s t u p n Is t u p t u O E O xx A xx Y x LH H LL L HX Z Product Pin Description Truth Table(1) Product Pin Configuration Notes: 1. H = High Signal Level L = Low Signal Level X = Don’t Care or Irrelevant Z = High Impedance 1 2 3 4 5 6 7 8 9 48 10 47 11 46 12 45 13 44 14 43 15 42 16 41 17 40 18 39 19 38 20 37 21 36 22 35 23 34 24 33 32 31 30 29 28 27 26 25 1OE 1Y1 1Y2 GND GND GND GND VCC VCC 4OE 1Y3 1Y4 2Y1 2Y2 2Y3 2Y4 3Y1 3Y2 3Y3 3Y4 4Y1 4Y2 4Y3 4Y4 2OE 1A1 1A2 GND GND GND GND VCC VCC 3OE 1A3 1A4 2A1 2A2 2A3 2A4 3A1 3A2 3A3 3A4 4A1 4A2 4A3 4A4 e m a N n i Pn o i t p i r c s e D E O x) W O L e v it c A ( s t u p n I e l b a n E t u p t u O e t a t S - 3 x A xs t u p n I x Y xs t u p t u O e t a t S - 3 D N Gd n u o r G V C C r e w o P 06-0214 |
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