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X24C01APIG Datasheet(PDF) 2 Page - IC MICROSYSTEMS |
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X24C01APIG Datasheet(HTML) 2 Page - IC MICROSYSTEMS |
2 / 13 page X24C01A 2 PIN DESCRIPTIONS Serial Clock (SCL) The SCL input is used to clock all data into and out of the device. Serial Data (SDA) SDA is a bidirectional pin used to transfer data into and out of the device. It is an open drain output and may be wire-ORed with any number of open drain or open collector outputs. An open drain output requires the use of a pull-up resistor. For selecting typical values, refer to the Guide- lines for Calculating Typical Values of Bus Pull-Up Resistors graph. Address (A0, A1, A2) The address inputs are used to set the least significant three bits of the seven bit slave address. These inputs can be static or actively driven. If used statically they must be tied to VSS or VCC as appropriate. If actively driven, they must be driven to VSS or to VCC. WRITE CONTROL (WC) The Write Control input controls the ability to write to the device. When WC is LOW (tied to VSS) the X24C01A will be enabled to perform write operations. When WC is HIGH (tied to VCC) the internal high voltage circuitry will be disabled and all writes will be disabled. DEVICE OPERATION The X24C01A supports a bidirectional bus oriented protocol. The protocol defines any device that sends data onto the bus as a transmitter, and the receiving device as the receiver. The device controlling the transfer is a master and the device being controlled is the slave. The master will always initiate data transfers and provide the clock for both transmit and receive operations. Therefore, the X24C01A will be considered a slave in all applications. V CC WC SCL SDA A 0 A 1 A 2 V SS 1 2 3 4 8 7 6 5 X24C01A PIN CONFIGURATION 3841 FHD F02 PIN NAMES Symbol Description A0–A2 Address Inputs SDA Serial Data SCL Serial Clock WC Write Control VSS Ground VCC +5V 3841 PGM T01 Clock and Data Conventions Data states on the SDA line can change only during SCL LOW. SDA state changes during SCL HIGH are re- served for indicating start and stop conditions. Refer to Figures 1 and 2. Start Condition All commands are preceded by the start condition, which is a HIGH to LOW transition of SDA when SCL is HIGH. The X24C01A continuously monitors the SDA and SCL lines for the start condition and will not respond to any command until this condition has been met. DIP/SOIC |
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