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X24C04S8M-3 Datasheet(PDF) 6 Page - IC MICROSYSTEMS |
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X24C04S8M-3 Datasheet(HTML) 6 Page - IC MICROSYSTEMS |
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6 / 18 page  6 X24C04 Page Write The X24C04 is capable of a sixteen byte page write operation. It is initiated in the same manner as the byte write operation, but instead of terminating the write cycle after the first data word is transferred, the master can transmit up to fifteen more words. After the receipt of each word, the X24C04 will respond with an acknowledge. After the receipt of each word, the four low order address bits are internally incremented by one. The high order five bits of the address remain constant. If the master should transmit more than sixteen words prior to generating the stop condition, the address counter will “roll over” and the previously written data will be overwritten. As with the byte write operation, all inputs are disabled until completion of the internal write cycle. Refer to Figure 6 for the address, acknowledge and data transfer sequence. Acknowledge Polling The disabling of the inputs can be used to take advan- tage of the typical 5 ms write cycle time. Once the stop condition is issued to indicate the end of the host’s write operation the X24C04 initiates the internal write cycle. ACK polling can be initiated immediately. This involves issuing the start condition followed by the slave address for a write operation. If the X24C04 is still busy with the write operation no ACK will be returned. If the X24C04 has completed the write operation an ACK will be returned and the host can then proceed with the next read or write operation. Refer to Flow 1. READ OPERATIONS Read operations are initiated in the same manner as write operations with the exception that the R/W bit of the slave address is set to a one. There are three basic read operations: current address read, random read and sequential read. It should be noted that the ninth clock cycle of the read operation is not a “don’t care.” To terminate a read operation, the master must either issue a stop condition during the ninth cycle or hold SDA HIGH during the ninth clock cycle and then issue a stop condition. Figure 6. Page Write BUS ACTIVITY: MASTER SDA LINE BUS ACTIVITY: X24C04 S T A R T SLAVE ADDRESS S S T O P P A C K A C K A C K A C K A C K WORD ADDRESS (n) DATA n DATA n+1 DATA n+15 NOTE: In this example n = xxxx 000 (B); x = 1 or 0 3839 FHD F11 Flow 1. ACK Polling Sequence WRITE OPERATION COMPLETED ENTER ACK POLLING ISSUE START ISSUE SLAVE ADDRESS AND R/W = 0 ACK RETURNED? NEXT OPERATION A WRITE? ISSUE BYTE ADDRESS PROCEED ISSUE STOP NO YES YES PROCEED ISSUE STOP NO 3839 FHD F12 |
Similar Part No. - X24C04S8M-3 |
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Similar Description - X24C04S8M-3 |
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