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X76F640H Datasheet(PDF) 11 Page - IC MICROSYSTEMS

Part # X76F640H
Description  Secure Serial Flash
Download  17 Pages
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Manufacturer  ICMIC [IC MICROSYSTEMS]
Direct Link  http://www.icmic.com
Logo ICMIC - IC MICROSYSTEMS

X76F640H Datasheet(HTML) 11 Page - IC MICROSYSTEMS

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X76F640
11
AC CHARACTERISTICS
AC Specifications (Over the recommended operating conditions)
Notes:1.
Typical values are for TA = 25˚C and VCC = 5.0V
Notes:2.
Cb = Total Capacitance of one bus line in pf.
Symbol
Parameter
Min
Typ
(1)
Max
Units
fSCL
SCL Clock Frequency
0
400
KHz
tIN(1)
Pulse width of spikes which must be suppressed by the
input filter
50
100
ns
tAA
SCL LOW to SDA Data Out Valid
0.1
0.3
0.9
∝s
tBUF
Time the bus must be free before a new transmit can
start
1.3
∝s
tLOW
Clock LOW Time
1.3
∝s
tHIGH
Clock HIGH Time
0.6
∝s
tSU:STA
Start Condition Setup Time
0.6
∝s
tHD:STA
Start Condition Hold Time
0.6
∝s
tSU:DAT
Data In Setup Time
100
ns
tHD:DAT
Data In Hold Time
0
∝s
tSU:STO
Stop Condition Setup Time
0.6
∝s
tDH
Data Output Hold Time
50
300
ns
tR
SDA and SCL Rise Time
20 + 0.1 x Cb(2)
300
ns
tF
SDA and SCL Fall Time
20 + 0.1 x Cb(2)
300
ns
tSU:CS
CS Setup Time
200
ns
tHD:CS
CS Hold Time
100
ns
fSCL_RST
SCL Clock Frequency during Response to Reset
400
kHz
tSR
Device Select to RST active
200
ns
tNOL
RST to SCL Non-Overlap
500
ns
tRST
RST High Time
2.25
∝s
tSU:RST
Response to Reset Setup Time
1.25
∝s
tLOW_RST
Clock LOW during Response to Reset
1.25
∝s
tHIGH_RST
Clock HIGH during Response to Reset
1.25
∝s
tRDV
RST LOW to SDA Valid During Response to Reset
0
500
ns
tCDV
CLK LOW to SDA Valid During Response to Reset
0
500
ns
tDHZ
Device Deselect to SDA high impedance
0
500
ns
7025 FM T14


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