 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
X24320V14 Datasheet(PDF) 7 Page - IC MICROSYSTEMS |
|
||||||||||||||||||||||||||||||
X24320V14 Datasheet(HTML) 7 Page - IC MICROSYSTEMS |
|
|
7 / 17 page  X24320 7 Acknowledge Polling The maximum write cycle time can be significantly reduced using Acknowledge Polling. To initiate Acknowledge Polling, the master issues a start condition followed by the Slave Address Byte for a write or read operation. If the device is still busy with the internal write cycle, then no ACK will be returned. If the device has completed the internal write operation, an ACK will be returned and the host can then proceed with the read or write operation. Refer to figure 7 . BYTE LOAD COMPLETED BY ISSUING STOP. ENTER ACK POLLING ISSUE START ISSUE SLAVE ADDRESS BYTE (READ OR WRITE) ACK RETURNED? HIGH VOLTAGE CYCLE COMPLETE. CONTINUE SEQUENCE? CONTINUE NORMAL READ OR WRITE COMMAND SEQUENCE PROCEED ISSUE STOP NO YES YES ISSUE STOP NO 7035 FM 09 READ OPERATIONS Read operations are initiated in the same manner as write operations with the exception that the R/W bit of the Slave Address Byte is set to one. There are three basic read operations: Current Address Reads, Random Reads, and Sequential Reads. Current Address Read Internally, the device contains an address counter that maintains the address of the last word read or written incremented by one. After a read operation from the last address in the array, the counter will “roll over” to the first address in the array. After a write operation to the last address in a given page, the counter will “roll over” to the first address on the same page. Upon receipt of the Slave Address Byte with the R/W bit set to one, the device issues an acknowledge and then transmits the eight bits of the Data Byte. The master terminates the read operation when it does not respond with an acknowledge during the ninth clock and then issues a stop condition. Refer to figure 8 for the address acknowledge, and data transfer sequence. It should be noted that the ninth clock cycle of the read operation is not a “don’t care " .” To terminate a read operation, the master must either issue a stop condition during the ninth cycle or hold SDA HIGH during the ninth clock cycle and then issue a stop condition. FROM THE S T A R T SLAVE ADDRESS S T O P A C K DATA SIGNALS FROM THE MASTER SDA BUS SIGNALS SLAVE 1 S P 01 0 1 7035 FM 10 Figure 7. Acknowledge Polling Sequence Figure 8. Current Address Read Sequence |
Similar Part No. - X24320V14 |
|
Similar Description - X24320V14 |
|
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.NET |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
