Part Name
         Description
M65KG256AB

 256Mbit (4 Banks x 4M x 16) 1.8V Supply, 133MHz Clock Rate, DDR Low Power SDRAM ( 51 Page)


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M65KG256AB
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List of figures
Figure 1.
Logic Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 2.
Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 3.
Simplified Command State Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 4.
AC Measurement I/O Waveform. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 5.
AC Measurement Load Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 6.
Consecutive Bank(Row) Activate Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 7.
Read followed by Read in Same Bank and Row . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 8.
Read followed by Read in a Different Bank . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 9.
Read with Auto Precharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 10.
Read with Auto Precharge AC Waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 11.
Read Operation (Burst Lengths = 2, 4 and 8, CAS Latency = 3) . . . . . . . . . . . . . . . . . . . . 34
Figure 12.
Burst Terminate During Read Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 13.
Write followed by Write in Same Bank and Row. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 14.
Write followed by Write in a Different Bank . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 15.
Write operation with Auto Precharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 16.
Write with Auto Precharge AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Figure 17.
Write Operation (Burst Lengths = 2, 4 and 8, CAS Latency = 1) . . . . . . . . . . . . . . . . . . . . 38
Figure 18.
Byte Write AC Waveforms (Data Masking using LDQM/UDQM) . . . . . . . . . . . . . . . . . . . . 39
Figure 19.
Mode Register/Extended Mode Register Set Commands AC Waveforms . . . . . . . . . . . . . 40
Figure 20.
Read followed by Write using the Burst Read Terminate Command (BST) . . . . . . . . . . . 41
Figure 21.
Write followed by Read (Write Completed). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Figure 22.
Write followed by Read in the same Bank and Row (Write Interrupted). . . . . . . . . . . . . . . 43
Figure 23.
Power-Up Sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Figure 24.
Auto Refresh Command AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Figure 25.
Self Refresh Entry and Exit Commands AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Figure 26.
Deep Power-Down Entry Command AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Figure 27.
Deep Power-Down Exit AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
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