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SNJ54LV166AFK Datasheet(PDF) 3 Page - Texas Instruments |
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SNJ54LV166AFK Datasheet(HTML) 3 Page - Texas Instruments |
3 / 18 page SN54LV166A, SN74LV166A 8BIT PARALLELLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 logic diagram (positive logic) 1D C1 15 9 7 6 13 SH/LD CLR CLK CLK INH QH 234 5 10 11 12 14 SER AB CD E F G H R 1D C1 R 1D C1 R 1D C1 R 1D C1 R 1D C1 R 1D C1 R 1D C1 R 1 Pin numbers shown are for the D, DB, DGV, J, NS, PW, and W packages. typical clear, shift, load, inhibit, and shift sequence Clear Load Inhibit H H H H H H H HHH L L L L L L CLK CLK INH SER A B C D E F G H SH/LD CLR QH Parallel Inputs Serial Shift Serial Shift |
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