TMS470R1VF338, TMS470R1VF348, TMS470R1VF3382, TMS470R1VF3482

16/32-BIT RISC FLASH MICROCONTROLLERS

SPNS077J – NOVEMBER 2001 – REVISED AUGUST 2006

8

POST OFFICE BOX 1443

Terminal Functions

† I = input, O = output, PWR = power, GND = ground, REF = reference voltage, NC = no connect

‡ All I/O pins, except RST, are configured as inputs while PORRST is low and immediately after PORRST goes high.

§ IPD = internal pulldown, IPU = internal pullup (all internal pullups and pulldowns are active on input pins, independent of the PORRST state.)

¶ N/A on the VF348x device. For the VF338x device only, the HET[28] signal is only connected to the pad not to a package pin.

TERMINAL

INTERNAL

PULLUP/

DESCRIPTION

NAME

VF338

VF348

HIGH-END TIMER (HET)

HET[0]

88

91

3.3-V I/O

IPD

The VF338x and VF348x devices have both the logic and registers for a

full 32-I/O HET implemented, even though not all 32 pins are available

externally

Timer input capture or output compare. The HET[31:0] applicable pins

can be programmed as general-purpose input/output (GIO) pins.

HET[22:0] are high-resolution pins and HET[31:29, 24] are standard-

resolution pins for VF338x.

HET[21:18, 13:10, 8, 7, 6, 4, 2, 0] are high-resolution pins and HET[31,

24] are standard-resolution pins for VF348x.

The high-resolution (HR) SHARE feature allows even HR pins to share

the next higher odd HR pin structures. This HR sharing is independent of

whether or not the odd pin is available externally. If an odd pin is available

externally and shared, then the odd pin can only be used as a general-

purpose I/O. For more information on HR SHARE, see the TMS470R1x

High-End Timer (HET) Reference Guide (literature number SPNU199).

The HET[19] or HET[18] pins can also be used as a user-selectable event

source to event trigger the MibADC event group or group1 providing the

associated register source bits are properly configured and defined. For

the internal device connections, see the MibADC section of this data

sheet. And for more detailed functional information on the MibADC, see

the TMS470R1x Multi-Buffered Analog-to-Digital Converter (MibADC)

Reference Guide (literature number SPNU206).

HET[1]

89

–

HET[2]

95

97

HET[3]

96

–

HET[4]

97

98

HET[5]

98

–

HET[6]

99

99

HET[7]

100

100

HET[8]

55

55

HET[9]

56

–

HET[10]

20

20

HET[11]

19

19

HET[12]

18

18

HET[13]

17

17

HET[14]

16

–

HET[15]

15

–

HET[16]

14

–

HET[17]

13

–

HET[18]

49

49

HET[19]

48

48

HET[20]

47

47

HET[21]

46

46

HET[22]

45

–

HET[24]

35

35

HET[28]

HET[29]

32

–

HET[30]

33

–

HET[31]

34

34

STANDARD CAN CONTROLLER (SCC)

CANSRX

60

59

3.3-V I/O

SCC receive pin or GIO pin

CANSTX

61

60

3.3-V I/O

IPU

SCC transmit pin or GIO pin

CLASS II SERIAL INTERFACE (C2SIb)

C2SIbLPN

36

36

3.3-V I/O

IPD

C2SIb module loopback enable pin or GIO pin

C2SIbRX

38

38

3.3-V I/O

C2SIb module receive data input pin or GIO pin

C2SIbTX

37

37

3.3-V I/O

IPD

C2SIb module transmit data output pin or GIO pin